{"id":"https://openalex.org/W2965759193","doi":"https://doi.org/10.1109/slip.2019.8771333","title":"Investigation of Cost-Optimal Network-on-Chip for Passive and Active Interposer Systems","display_name":"Investigation of Cost-Optimal Network-on-Chip for Passive and Active Interposer Systems","publication_year":2019,"publication_date":"2019-06-01","ids":{"openalex":"https://openalex.org/W2965759193","doi":"https://doi.org/10.1109/slip.2019.8771333","mag":"2965759193"},"language":"en","primary_location":{"id":"doi:10.1109/slip.2019.8771333","is_oa":false,"landing_page_url":"https://doi.org/10.1109/slip.2019.8771333","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5008289553","display_name":"Dylan Stow","orcid":"https://orcid.org/0000-0003-4302-5649"},"institutions":[{"id":"https://openalex.org/I154570441","display_name":"University of California, Santa Barbara","ror":"https://ror.org/02t274463","country_code":"US","type":"education","lineage":["https://openalex.org/I154570441"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Dylan Stow","raw_affiliation_strings":["University of California, Santa Barbara, Santa Barbara, California"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California, Santa Barbara, Santa Barbara, California","institution_ids":["https://openalex.org/I154570441"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5088057430","display_name":"Itir Akgun","orcid":"https://orcid.org/0000-0002-5811-4401"},"institutions":[{"id":"https://openalex.org/I154570441","display_name":"University of California, Santa Barbara","ror":"https://ror.org/02t274463","country_code":"US","type":"education","lineage":["https://openalex.org/I154570441"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Itir Akgun","raw_affiliation_strings":["University of California, Santa Barbara, Santa Barbara, California"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California, Santa Barbara, Santa Barbara, California","institution_ids":["https://openalex.org/I154570441"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100385336","display_name":"Yuan Xie","orcid":"https://orcid.org/0000-0003-2093-1788"},"institutions":[{"id":"https://openalex.org/I154570441","display_name":"University of California, Santa Barbara","ror":"https://ror.org/02t274463","country_code":"US","type":"education","lineage":["https://openalex.org/I154570441"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yuan Xie","raw_affiliation_strings":["University of California, Santa Barbara, Santa Barbara, California"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California, Santa Barbara, Santa Barbara, California","institution_ids":["https://openalex.org/I154570441"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I154570441"],"apc_list":null,"apc_paid":null,"fwci":0.3551,"has_fulltext":false,"cited_by_count":23,"citation_normalized_percentile":{"value":0.63010769,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/interposer","display_name":"Interposer","score":0.9783583879470825},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.7183248996734619},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5646454691886902},{"id":"https://openalex.org/keywords/network-topology","display_name":"Network topology","score":0.5027725696563721},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.48044297099113464},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.4404732584953308},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.4391443133354187},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.35879743099212646},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3447428345680237},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.3217310905456543},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2665276527404785},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.13808134198188782},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.137739360332489}],"concepts":[{"id":"https://openalex.org/C158802814","wikidata":"https://www.wikidata.org/wiki/Q6056418","display_name":"Interposer","level":4,"score":0.9783583879470825},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.7183248996734619},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5646454691886902},{"id":"https://openalex.org/C199845137","wikidata":"https://www.wikidata.org/wiki/Q145490","display_name":"Network topology","level":2,"score":0.5027725696563721},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.48044297099113464},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.4404732584953308},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.4391443133354187},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.35879743099212646},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3447428345680237},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.3217310905456543},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2665276527404785},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.13808134198188782},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.137739360332489},{"id":"https://openalex.org/C100460472","wikidata":"https://www.wikidata.org/wiki/Q2368605","display_name":"Etching (microfabrication)","level":3,"score":0.0},{"id":"https://openalex.org/C2779227376","wikidata":"https://www.wikidata.org/wiki/Q6505497","display_name":"Layer (electronics)","level":2,"score":0.0},{"id":"https://openalex.org/C159985019","wikidata":"https://www.wikidata.org/wiki/Q181790","display_name":"Composite material","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/slip.2019.8771333","is_oa":false,"landing_page_url":"https://doi.org/10.1109/slip.2019.8771333","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP)","raw_type":"proceedings-article"},{"id":"pmh:oai:repository.hkust.edu.hk:1783.1-133145","is_oa":false,"landing_page_url":"http://lbdiscover.ust.hk/uresolver?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rfr_id=info:sid/HKUST:SPI&rft.genre=article&rft.issn=&rft.volume=&rft.issue=&rft.date=2019&rft.spage=&rft.aulast=Stow&rft.aufirst=Dylan&rft.atitle=Investigation+of+cost-optimal+network-on-chip+for+passive+and+active+interposer+systems&rft.title=2019+ACM%2FIEEE+International+Workshop+on+System+Level+Interconnect+Prediction%2C+SLIP+2019","pdf_url":null,"source":{"id":"https://openalex.org/S4306401796","display_name":"Rare & Special e-Zone (The Hong Kong University of Science and Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I200769079","host_organization_name":"Hong Kong University of Science and Technology","host_organization_lineage":["https://openalex.org/I200769079"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Conference paper"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.46000000834465027,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W1985818188","https://openalex.org/W2019690221","https://openalex.org/W2025516544","https://openalex.org/W2034822545","https://openalex.org/W2097235232","https://openalex.org/W2111081435","https://openalex.org/W2118231264","https://openalex.org/W2119677480","https://openalex.org/W2123055496","https://openalex.org/W2170875070","https://openalex.org/W2234584938","https://openalex.org/W2290686466","https://openalex.org/W2512569446","https://openalex.org/W2514838290","https://openalex.org/W2532719504","https://openalex.org/W2553576255","https://openalex.org/W2625200202","https://openalex.org/W2772144122","https://openalex.org/W2791952321","https://openalex.org/W2899948421","https://openalex.org/W4244395536"],"related_works":["https://openalex.org/W2528892790","https://openalex.org/W2117988687","https://openalex.org/W2018755015","https://openalex.org/W1980085932","https://openalex.org/W2594964164","https://openalex.org/W2030249421","https://openalex.org/W1966736993","https://openalex.org/W2022199660","https://openalex.org/W2547794540","https://openalex.org/W2161995522"],"abstract_inverted_index":{"Interposer-based":[0],"packaging":[1],"is":[2],"becoming":[3],"a":[4,14,95],"widespread":[5],"methodology":[6],"for":[7,94],"tightly":[8],"integrating":[9],"multiple":[10],"heterogeneous":[11],"dies":[12],"into":[13],"single":[15],"package,":[16],"with":[17],"the":[18,48,90],"potential":[19],"to":[20,59,88],"improve":[21],"manufacturing":[22],"yield":[23],"and":[24,36,66,79,85],"build":[25],"larger-than-reticle-sized":[26],"systems.":[27],"However,":[28],"interposer":[29,50,74,81,92],"integration":[30],"also":[31],"introduces":[32],"possible":[33],"communication":[34,63],"bottlenecks":[35],"cost":[37],"overheads":[38],"that":[39],"can":[40,52],"outweigh":[41],"these":[42,46],"benefits.":[43],"To":[44],"avoid":[45],"drawbacks,":[47],"abundant":[49],"interconnect":[51],"be":[53],"leveraged":[54],"as":[55],"network-on-chip":[56,83],"interconnection":[57],"fabric":[58],"provide":[60],"high-bandwidth,":[61],"low-latency":[62],"between":[64],"chiplets":[65],"memory":[67],"stacks.":[68],"This":[69],"work":[70],"investigates":[71],"this":[72],"new":[73],"design":[75],"space":[76],"of":[77,97],"passive":[78],"active":[80],"technologies,":[82],"topologies,":[84],"clocking":[86],"schemes":[87],"determine":[89],"cost-optimal":[91],"architectures":[93],"range":[96],"performance":[98],"requirements.":[99]},"counts_by_year":[{"year":2026,"cited_by_count":3},{"year":2025,"cited_by_count":8},{"year":2024,"cited_by_count":9},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2019,"cited_by_count":1}],"updated_date":"2026-07-02T09:51:11.867554","created_date":"2025-10-10T00:00:00"}