{"id":"https://openalex.org/W2091126337","doi":"https://doi.org/10.1109/siu.2012.6204544","title":"Implementation of Izhikevich neuron model with field programmable devices","display_name":"Implementation of Izhikevich neuron model with field programmable devices","publication_year":2012,"publication_date":"2012-04-01","ids":{"openalex":"https://openalex.org/W2091126337","doi":"https://doi.org/10.1109/siu.2012.6204544","mag":"2091126337"},"language":"en","primary_location":{"id":"doi:10.1109/siu.2012.6204544","is_oa":false,"landing_page_url":"https://doi.org/10.1109/siu.2012.6204544","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 20th Signal Processing and Communications Applications Conference (SIU)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111863299","display_name":"Nimet Dahasert","orcid":null},"institutions":[{"id":"https://openalex.org/I87673952","display_name":"Erciyes University","ror":"https://ror.org/047g8vk19","country_code":"TR","type":"education","lineage":["https://openalex.org/I87673952"]}],"countries":["TR"],"is_corresponding":false,"raw_author_name":"Nimet Dahasert","raw_affiliation_strings":["Elektrik-Elektronik M\u00fchendisli\u011fi B\u00f6l\u00fcm\u00fc, Erciyes \u00dcniversitesi, Turkey"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Elektrik-Elektronik M\u00fchendisli\u011fi B\u00f6l\u00fcm\u00fc, Erciyes \u00dcniversitesi, Turkey","institution_ids":["https://openalex.org/I87673952"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100774394","display_name":"\u0130smail \u00d6zt\u00fcrk","orcid":"https://orcid.org/0000-0001-9561-4651"},"institutions":[{"id":"https://openalex.org/I87673952","display_name":"Erciyes University","ror":"https://ror.org/047g8vk19","country_code":"TR","type":"education","lineage":["https://openalex.org/I87673952"]}],"countries":["TR"],"is_corresponding":false,"raw_author_name":"Ismail Ozturk","raw_affiliation_strings":["Elektrik-Elektronik M\u00fchendisli\u011fi B\u00f6l\u00fcm\u00fc, Erciyes \u00dcniversitesi, Turkey"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Elektrik-Elektronik M\u00fchendisli\u011fi B\u00f6l\u00fcm\u00fc, Erciyes \u00dcniversitesi, Turkey","institution_ids":["https://openalex.org/I87673952"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5023845957","display_name":"Recai K\u0131l\u0131\u00e7","orcid":"https://orcid.org/0000-0002-5069-6603"},"institutions":[{"id":"https://openalex.org/I87673952","display_name":"Erciyes University","ror":"https://ror.org/047g8vk19","country_code":"TR","type":"education","lineage":["https://openalex.org/I87673952"]}],"countries":["TR"],"is_corresponding":false,"raw_author_name":"Recai Kilic","raw_affiliation_strings":["Elektrik-Elektronik M\u00fchendisli\u011fi B\u00f6l\u00fcm\u00fc, Erciyes \u00dcniversitesi, Turkey"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Elektrik-Elektronik M\u00fchendisli\u011fi B\u00f6l\u00fcm\u00fc, Erciyes \u00dcniversitesi, Turkey","institution_ids":["https://openalex.org/I87673952"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I87673952"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.23072703,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11513","display_name":"stochastic dynamics and bifurcation","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/3109","display_name":"Statistical and Nonlinear Physics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10320","display_name":"Neural Networks and Applications","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.876507580280304},{"id":"https://openalex.org/keywords/programmable-array-logic","display_name":"Programmable Array Logic","score":0.8118859529495239},{"id":"https://openalex.org/keywords/macrocell-array","display_name":"Macrocell array","score":0.7000125646591187},{"id":"https://openalex.org/keywords/field-programmable-analog-array","display_name":"Field-programmable analog array","score":0.6569755673408508},{"id":"https://openalex.org/keywords/simple-programmable-logic-device","display_name":"Simple programmable logic device","score":0.6232304573059082},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6220504641532898},{"id":"https://openalex.org/keywords/programmable-logic-array","display_name":"Programmable logic array","score":0.6104087829589844},{"id":"https://openalex.org/keywords/biological-neuron-model","display_name":"Biological neuron model","score":0.6016049981117249},{"id":"https://openalex.org/keywords/erasable-programmable-logic-device","display_name":"Erasable programmable logic device","score":0.5931518077850342},{"id":"https://openalex.org/keywords/programmable-logic-device","display_name":"Programmable logic device","score":0.5553508996963501},{"id":"https://openalex.org/keywords/field","display_name":"Field (mathematics)","score":0.4952651560306549},{"id":"https://openalex.org/keywords/gate-array","display_name":"Gate array","score":0.42106005549430847},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.35619819164276123},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3335687518119812},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.33002740144729614},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.32866114377975464},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.25038886070251465},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17147040367126465},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.17146575450897217},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.14425840973854065},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.0689002275466919},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.06332647800445557},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.062489837408065796}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.876507580280304},{"id":"https://openalex.org/C113323844","wikidata":"https://www.wikidata.org/wiki/Q1378651","display_name":"Programmable Array Logic","level":5,"score":0.8118859529495239},{"id":"https://openalex.org/C142278197","wikidata":"https://www.wikidata.org/wiki/Q4284934","display_name":"Macrocell array","level":5,"score":0.7000125646591187},{"id":"https://openalex.org/C149128552","wikidata":"https://www.wikidata.org/wiki/Q380201","display_name":"Field-programmable analog array","level":5,"score":0.6569755673408508},{"id":"https://openalex.org/C34370810","wikidata":"https://www.wikidata.org/wiki/Q3961319","display_name":"Simple programmable logic device","level":5,"score":0.6232304573059082},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6220504641532898},{"id":"https://openalex.org/C182322920","wikidata":"https://www.wikidata.org/wiki/Q2112217","display_name":"Programmable logic array","level":3,"score":0.6104087829589844},{"id":"https://openalex.org/C186565885","wikidata":"https://www.wikidata.org/wiki/Q1651163","display_name":"Biological neuron model","level":3,"score":0.6016049981117249},{"id":"https://openalex.org/C110050671","wikidata":"https://www.wikidata.org/wiki/Q1063837","display_name":"Erasable programmable logic device","level":5,"score":0.5931518077850342},{"id":"https://openalex.org/C206274596","wikidata":"https://www.wikidata.org/wiki/Q1063837","display_name":"Programmable logic device","level":2,"score":0.5553508996963501},{"id":"https://openalex.org/C9652623","wikidata":"https://www.wikidata.org/wiki/Q190109","display_name":"Field (mathematics)","level":2,"score":0.4952651560306549},{"id":"https://openalex.org/C114237110","wikidata":"https://www.wikidata.org/wiki/Q114901","display_name":"Gate array","level":3,"score":0.42106005549430847},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.35619819164276123},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3335687518119812},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.33002740144729614},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.32866114377975464},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.25038886070251465},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17147040367126465},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.17146575450897217},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.14425840973854065},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0689002275466919},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.06332647800445557},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.062489837408065796},{"id":"https://openalex.org/C13412647","wikidata":"https://www.wikidata.org/wiki/Q174948","display_name":"Analog signal","level":3,"score":0.0},{"id":"https://openalex.org/C98142538","wikidata":"https://www.wikidata.org/wiki/Q485005","display_name":"Analog multiplier","level":4,"score":0.0},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.0},{"id":"https://openalex.org/C202444582","wikidata":"https://www.wikidata.org/wiki/Q837863","display_name":"Pure mathematics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/siu.2012.6204544","is_oa":false,"landing_page_url":"https://doi.org/10.1109/siu.2012.6204544","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 20th Signal Processing and Communications Applications Conference (SIU)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1983740006","https://openalex.org/W1985940938","https://openalex.org/W1995341919","https://openalex.org/W2016354087","https://openalex.org/W2046424015","https://openalex.org/W2090738355","https://openalex.org/W2118459793","https://openalex.org/W2123572739","https://openalex.org/W2131125425","https://openalex.org/W2131217557","https://openalex.org/W2157239334","https://openalex.org/W2163057446","https://openalex.org/W2164653071"],"related_works":["https://openalex.org/W3117015220","https://openalex.org/W2038293309","https://openalex.org/W1904803855","https://openalex.org/W3163714531","https://openalex.org/W2764789987","https://openalex.org/W2466591189","https://openalex.org/W1541210136","https://openalex.org/W2558075157","https://openalex.org/W2534453537","https://openalex.org/W2091126337"],"abstract_inverted_index":{"In":[0],"this":[1],"study,":[2],"Izhikevich":[3],"Neuron":[4],"Model,":[5],"which":[6],"can":[7],"be":[8],"exhibited":[9],"different":[10],"behaviors,":[11],"is":[12,56],"implemented":[13],"experimentally":[14],"with":[15,44,69],"programmable":[16,45],"devices,":[17],"FPGA":[18],"(Field":[19,25],"Programmable":[20,26],"Gate":[21],"Array)":[22],"and":[23],"FPAA":[24],"Analog":[27],"Array).":[28],"After":[29],"testing":[30],"the":[31,39,61,70],"behaviors":[32],"of":[33,63,74],"neuron":[34,75],"models":[35],"through":[36],"numerical":[37,71],"analyses,":[38],"experimental":[40],"setups":[41],"are":[42],"constructed":[43],"devices.":[46],"A":[47],"switching":[48],"mechanism,":[49],"that":[50],"provides":[51],"convenience":[52],"to":[53],"observe":[54],"results,":[55],"proposed":[57],"as":[58,60],"well":[59],"advantage":[62],"FPGA's":[64],"programmability.":[65],"Experimental":[66],"results":[67,73],"agree":[68],"analyses":[72],"model.":[76]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
