{"id":"https://openalex.org/W4416750262","doi":"https://doi.org/10.1109/sips66314.2025.11261267","title":"Revisiting GRAND via High Level Synthesis","display_name":"Revisiting GRAND via High Level Synthesis","publication_year":2025,"publication_date":"2025-11-01","ids":{"openalex":"https://openalex.org/W4416750262","doi":"https://doi.org/10.1109/sips66314.2025.11261267"},"language":"en","primary_location":{"id":"doi:10.1109/sips66314.2025.11261267","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sips66314.2025.11261267","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE Workshop on Signal Processing Systems (SiPS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5108925123","display_name":"Tuomas Aaltonen","orcid":null},"institutions":[{"id":"https://openalex.org/I166825849","display_name":"Tampere University","ror":"https://ror.org/033003e23","country_code":"FI","type":"education","lineage":["https://openalex.org/I166825849"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"Tuomas Aaltonen","raw_affiliation_strings":["Tampere University,Faculty of Information Technology and Communication Sciences,Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Tampere University,Faculty of Information Technology and Communication Sciences,Finland","institution_ids":["https://openalex.org/I166825849"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054197935","display_name":"Mikko Valkama","orcid":"https://orcid.org/0000-0003-0361-0800"},"institutions":[{"id":"https://openalex.org/I166825849","display_name":"Tampere University","ror":"https://ror.org/033003e23","country_code":"FI","type":"education","lineage":["https://openalex.org/I166825849"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"Mikko Valkama","raw_affiliation_strings":["Tampere University,Faculty of Information Technology and Communication Sciences,Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Tampere University,Faculty of Information Technology and Communication Sciences,Finland","institution_ids":["https://openalex.org/I166825849"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5026006051","display_name":"Syed Mohsin Abbas","orcid":"https://orcid.org/0000-0002-5719-3654"},"institutions":[{"id":"https://openalex.org/I166825849","display_name":"Tampere University","ror":"https://ror.org/033003e23","country_code":"FI","type":"education","lineage":["https://openalex.org/I166825849"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"Syed Mohsin Abbas","raw_affiliation_strings":["Tampere University,Faculty of Information Technology and Communication Sciences,Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Tampere University,Faculty of Information Technology and Communication Sciences,Finland","institution_ids":["https://openalex.org/I166825849"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I166825849"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.42121795,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.1655000001192093,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.1655000001192093,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":0.14190000295639038,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10125","display_name":"Advanced Wireless Communication Techniques","score":0.14079999923706055,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.7967000007629395},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.6326000094413757},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.6134999990463257},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.567300021648407},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.5002999901771545},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.4092000126838684},{"id":"https://openalex.org/keywords/random-access","display_name":"Random access","score":0.38179999589920044},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.3732999861240387}],"concepts":[{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.7967000007629395},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7264999747276306},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.6326000094413757},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.6134999990463257},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.567300021648407},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.5002999901771545},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4715000092983246},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4535999894142151},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.41110000014305115},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.4092000126838684},{"id":"https://openalex.org/C101722063","wikidata":"https://www.wikidata.org/wiki/Q218825","display_name":"Random access","level":2,"score":0.38179999589920044},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.3732999861240387},{"id":"https://openalex.org/C46637626","wikidata":"https://www.wikidata.org/wiki/Q6693015","display_name":"Low latency (capital markets)","level":2,"score":0.3560999929904938},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.353300005197525},{"id":"https://openalex.org/C65232700","wikidata":"https://www.wikidata.org/wiki/Q5656403","display_name":"Hardware architecture","level":3,"score":0.3393000066280365},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.32179999351501465},{"id":"https://openalex.org/C13164978","wikidata":"https://www.wikidata.org/wiki/Q600158","display_name":"Hardware acceleration","level":3,"score":0.3147999942302704},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.30820000171661377},{"id":"https://openalex.org/C115874739","wikidata":"https://www.wikidata.org/wiki/Q825377","display_name":"Critical path method","level":2,"score":0.2890999913215637},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.28060001134872437},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.2800000011920929},{"id":"https://openalex.org/C41045048","wikidata":"https://www.wikidata.org/wiki/Q202843","display_name":"Linear programming","level":2,"score":0.2718000113964081},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.26750001311302185}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/sips66314.2025.11261267","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sips66314.2025.11261267","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE Workshop on Signal Processing Systems (SiPS)","raw_type":"proceedings-article"},{"id":"pmh:oai:trepo.tuni.fi:10024/233878","is_oa":false,"landing_page_url":"https://trepo.tuni.fi/handle/10024/233878","pdf_url":null,"source":{"id":"https://openalex.org/S4306401860","display_name":"Tampere University Institutional Repository (Tampere University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I150589677","host_organization_name":"Tampere University of Applied Sciences","host_organization_lineage":["https://openalex.org/I150589677"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"conference"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":28,"referenced_works":["https://openalex.org/W1977467261","https://openalex.org/W1995875735","https://openalex.org/W2083774980","https://openalex.org/W2150498905","https://openalex.org/W2164719123","https://openalex.org/W2171318521","https://openalex.org/W2954103209","https://openalex.org/W3021847272","https://openalex.org/W3045960439","https://openalex.org/W3088391629","https://openalex.org/W3162667157","https://openalex.org/W3208657910","https://openalex.org/W3211241230","https://openalex.org/W3212772463","https://openalex.org/W4205855417","https://openalex.org/W4293812300","https://openalex.org/W4310748967","https://openalex.org/W4360605854","https://openalex.org/W4366483621","https://openalex.org/W4383199388","https://openalex.org/W4385950659","https://openalex.org/W4387448614","https://openalex.org/W4387448714","https://openalex.org/W4398199908","https://openalex.org/W4400063898","https://openalex.org/W4405090261","https://openalex.org/W4406753728","https://openalex.org/W4406793919"],"related_works":[],"abstract_inverted_index":{"Guessing":[0],"Random":[1],"Additive":[2],"Noise":[3],"Decoding":[4],"(GRAND)":[5],"is":[6,103,116,147],"a":[7,131],"recently":[8],"proposed":[9,71],"universal":[10],"decoding":[11,34,95,145],"technique":[12],"for":[13,68,78,105],"short":[14],"linear":[15],"block":[16],"codes.":[17],"GRAND-based":[18],"hardware":[19,65,80,98,140],"implementations":[20],"range":[21],"from":[22],"those":[23,37],"aimed":[24,38],"at":[25,29,39,43],"low":[26,41],"resource":[27,48],"utilization":[28],"the":[30,44,51,59,85,90,94,107,113,120,143,150,153],"expense":[31],"of":[32,46,53,134,152],"higher":[33,47],"latency":[35,42,96,146,151],"to":[36,88,118],"achieving":[40],"cost":[45],"utilization.":[49],"To":[50],"best":[52],"our":[54],"knowledge,":[55],"this":[56],"work":[57],"offers":[58],"first":[60],"High-Level":[61],"Synthesis":[62],"(HLS)-based":[63],"open-source":[64],"implementation":[66,81,86,124],"framework":[67,72,102],"GRAND.":[69,155],"The":[70,100],"simplifies":[73],"Design":[74],"Space":[75],"Exploration":[76],"(DSE)":[77],"GRAND":[79,110,129],"and":[82,97,112],"facilitates":[83],"selecting":[84],"parameters":[87],"achieve":[89],"optimal":[91],"tradeoff":[92],"between":[93],"resources.":[99],"HLS-based":[101],"employed":[104],"developing":[106],"baseline":[108,154],"hard-input":[109],"hardware,":[111],"VLSI":[114],"architecture":[115],"modified":[117],"increase":[119],"parallelization":[121,132],"factor.":[122],"Hardware":[123],"results":[125],"demonstrate":[126],"that":[127],"improved":[128],"with":[130],"factor":[133],"4":[135],"requires":[136],"$34":[137],"\\%$":[138],"more":[139],"resources;":[141],"however,":[142],"worst-case":[144],"$\\frac{1}{4}":[148],"\\times$":[149]},"counts_by_year":[],"updated_date":"2026-08-26T07:47:46.906454","created_date":"2025-11-28T00:00:00"}
