{"id":"https://openalex.org/W2907429908","doi":"https://doi.org/10.1109/sips.2018.8598394","title":"Memory-efficient Error Correction Scheme for Flash Memories using GPU","display_name":"Memory-efficient Error Correction Scheme for Flash Memories using GPU","publication_year":2018,"publication_date":"2018-10-01","ids":{"openalex":"https://openalex.org/W2907429908","doi":"https://doi.org/10.1109/sips.2018.8598394","mag":"2907429908"},"language":"en","primary_location":{"id":"doi:10.1109/sips.2018.8598394","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sips.2018.8598394","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE International Workshop on Signal Processing Systems (SiPS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5066089541","display_name":"Arul K. Subbiah","orcid":"https://orcid.org/0000-0003-1276-5193"},"institutions":[{"id":"https://openalex.org/I16269868","display_name":"Santa Clara University","ror":"https://ror.org/03ypqe447","country_code":"US","type":"education","lineage":["https://openalex.org/I16269868"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Arul K. Subbiah","raw_affiliation_strings":["Department of Electrical Engineering, Santa Clara University, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Santa Clara University, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I16269868"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5025538938","display_name":"Tokunbo Ogunfunmi","orcid":"https://orcid.org/0000-0003-3517-9779"},"institutions":[{"id":"https://openalex.org/I16269868","display_name":"Santa Clara University","ror":"https://ror.org/03ypqe447","country_code":"US","type":"education","lineage":["https://openalex.org/I16269868"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Tokunbo Ogunfunmi","raw_affiliation_strings":["Department of Electrical Engineering, Santa Clara University, Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Santa Clara University, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I16269868"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5066089541"],"corresponding_institution_ids":["https://openalex.org/I16269868"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.17807382,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"4","issue":null,"first_page":"118","last_page":"122"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10682","display_name":"Quantum Computing Algorithms and Architecture","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/bch-code","display_name":"BCH code","score":0.8072177171707153},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7982566356658936},{"id":"https://openalex.org/keywords/parity-bit","display_name":"Parity bit","score":0.7507187724113464},{"id":"https://openalex.org/keywords/byte","display_name":"Byte","score":0.7076890468597412},{"id":"https://openalex.org/keywords/error-detection-and-correction","display_name":"Error detection and correction","score":0.6428704857826233},{"id":"https://openalex.org/keywords/encoder","display_name":"Encoder","score":0.5308590531349182},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.500267744064331},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.48796361684799194},{"id":"https://openalex.org/keywords/lookup-table","display_name":"Lookup table","score":0.475579172372818},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4644570052623749},{"id":"https://openalex.org/keywords/flash-memory","display_name":"Flash memory","score":0.45994800329208374},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4421252906322479},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.3958311975002289},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.11954155564308167}],"concepts":[{"id":"https://openalex.org/C42276685","wikidata":"https://www.wikidata.org/wiki/Q795705","display_name":"BCH code","level":3,"score":0.8072177171707153},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7982566356658936},{"id":"https://openalex.org/C131521367","wikidata":"https://www.wikidata.org/wiki/Q625502","display_name":"Parity bit","level":2,"score":0.7507187724113464},{"id":"https://openalex.org/C43364308","wikidata":"https://www.wikidata.org/wiki/Q8799","display_name":"Byte","level":2,"score":0.7076890468597412},{"id":"https://openalex.org/C103088060","wikidata":"https://www.wikidata.org/wiki/Q1062839","display_name":"Error detection and correction","level":2,"score":0.6428704857826233},{"id":"https://openalex.org/C118505674","wikidata":"https://www.wikidata.org/wiki/Q42586063","display_name":"Encoder","level":2,"score":0.5308590531349182},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.500267744064331},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.48796361684799194},{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.475579172372818},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4644570052623749},{"id":"https://openalex.org/C2776531357","wikidata":"https://www.wikidata.org/wiki/Q174077","display_name":"Flash memory","level":2,"score":0.45994800329208374},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4421252906322479},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.3958311975002289},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.11954155564308167},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/sips.2018.8598394","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sips.2018.8598394","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE International Workshop on Signal Processing Systems (SiPS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1450066936","https://openalex.org/W1569071776","https://openalex.org/W1980308149","https://openalex.org/W2036930611","https://openalex.org/W2039640984","https://openalex.org/W2050685430","https://openalex.org/W2139910577","https://openalex.org/W2293516228","https://openalex.org/W2602222563","https://openalex.org/W4239889878","https://openalex.org/W6660307388"],"related_works":["https://openalex.org/W2912502034","https://openalex.org/W2319574489","https://openalex.org/W2035908476","https://openalex.org/W2113497070","https://openalex.org/W2508865029","https://openalex.org/W4319430489","https://openalex.org/W2085844453","https://openalex.org/W2169203351","https://openalex.org/W2085632233","https://openalex.org/W1736628856"],"abstract_inverted_index":{"In":[0],"this":[1,84],"paper,":[2],"we":[3],"present":[4],"an":[5],"alternate":[6],"method":[7,85],"to":[8,32,43,75,134],"organize":[9],"the":[10,41,57,61,67,70,82,91,112,125,129,149,157],"parity":[11,30,58,92,154],"bits":[12,59,155],"of":[13,56,69,72,114,131],"Bose-Chaudhuri-Hocquenghen":[14],"(BCH)":[15],"encoder":[16],"on":[17],"a":[18,36,87,95],"Flash":[19],"memory":[20,54],"array.":[21],"Previous":[22],"methods":[23],"for":[24,46,94,128,153],"BCH":[25,115],"error":[26,49,145],"correction":[27,50,146],"scheme":[28],"requires":[29],"bytes":[31],"be":[33,76,135],"stored":[34,101],"within":[35],"given":[37,96],"block":[38],"thus":[39],"reducing":[40],"ability":[42],"scale":[44],"up":[45],"higher":[47],"bit":[48,73,132,144],"capabilities.":[51],"A":[52],"new":[53],"organization":[55],"in":[60,102,111,143],"user":[62,97,150],"area":[63,127,152],"is":[64,78,139],"proposed,":[65],"so":[66],"limitation":[68],"number":[71,130],"errors":[74,133],"corrected":[77],"removed.":[79],"Without":[80],"sacrificing":[81],"throughput,":[83],"provides":[86],"LUT":[88],"approach":[89],"where":[90],"bits,":[93],"data":[98,151],"block,":[99],"are":[100,120],"local":[103],"GPU":[104,159],"memory.":[105],"The":[106],"experimental":[107],"results":[108],"show":[109],"that,":[110],"case":[113],"(8191,":[116],"7983,":[117],"16),":[118],"there":[119,138],"no":[121,140],"limitations":[122],"imposed":[123],"by":[124,147],"spare":[126],"corrected.":[136],"Also,":[137],"speed":[141],"degradation":[142],"utilizing":[148],"with":[156],"proposed":[158],"implementation.":[160]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}