{"id":"https://openalex.org/W2082703745","doi":"https://doi.org/10.1109/sips.2014.6986088","title":"FPGA implementation of a clockless stochastic LDPC decoder","display_name":"FPGA implementation of a clockless stochastic LDPC decoder","publication_year":2014,"publication_date":"2014-10-01","ids":{"openalex":"https://openalex.org/W2082703745","doi":"https://doi.org/10.1109/sips.2014.6986088","mag":"2082703745"},"language":"en","primary_location":{"id":"doi:10.1109/sips.2014.6986088","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sips.2014.6986088","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE Workshop on Signal Processing Systems (SiPS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://zenodo.org/record/1280220","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5112276929","display_name":"Chris Ceroici","orcid":null},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Chris Ceroici","raw_affiliation_strings":["University of Waterloo, Waterloo, ON, CA","Department of Electrical and Computer, Engineering, University of Waterloo, Waterloo, ON, Canada N2L 3G1"],"affiliations":[{"raw_affiliation_string":"University of Waterloo, Waterloo, ON, CA","institution_ids":[]},{"raw_affiliation_string":"Department of Electrical and Computer, Engineering, University of Waterloo, Waterloo, ON, Canada N2L 3G1","institution_ids":["https://openalex.org/I151746483"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5024704337","display_name":"Vincent Gaudet","orcid":"https://orcid.org/0000-0002-5534-0825"},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Vincent C. Gaudet","raw_affiliation_strings":["University of Waterloo, Waterloo, ON, CA","Department of Electrical and Computer, Engineering, University of Waterloo, Waterloo, ON, Canada N2L 3G1"],"affiliations":[{"raw_affiliation_string":"University of Waterloo, Waterloo, ON, CA","institution_ids":[]},{"raw_affiliation_string":"Department of Electrical and Computer, Engineering, University of Waterloo, Waterloo, ON, Canada N2L 3G1","institution_ids":["https://openalex.org/I151746483"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5112276929"],"corresponding_institution_ids":["https://openalex.org/I151746483"],"apc_list":null,"apc_paid":null,"fwci":1.0857,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.81516955,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10125","display_name":"Advanced Wireless Communication Techniques","score":0.996999979019165,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10964","display_name":"Wireless Communication Security Techniques","score":0.9926000237464905,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/stratix","display_name":"Stratix","score":0.9400719404220581},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8076269626617432},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7382638454437256},{"id":"https://openalex.org/keywords/low-density-parity-check-code","display_name":"Low-density parity-check code","score":0.7156898975372314},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.6710702776908875},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.5306947231292725},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5109097361564636},{"id":"https://openalex.org/keywords/gate-array","display_name":"Gate array","score":0.5013048648834229},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.46753308176994324},{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.4399524927139282},{"id":"https://openalex.org/keywords/multiplication","display_name":"Multiplication (music)","score":0.41691142320632935},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3917856216430664},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.34627312421798706},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.3187938928604126},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.286879301071167},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.12879976630210876},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.09597200155258179}],"concepts":[{"id":"https://openalex.org/C2776277307","wikidata":"https://www.wikidata.org/wiki/Q22074755","display_name":"Stratix","level":3,"score":0.9400719404220581},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8076269626617432},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7382638454437256},{"id":"https://openalex.org/C67692717","wikidata":"https://www.wikidata.org/wiki/Q187444","display_name":"Low-density parity-check code","level":3,"score":0.7156898975372314},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.6710702776908875},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.5306947231292725},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5109097361564636},{"id":"https://openalex.org/C114237110","wikidata":"https://www.wikidata.org/wiki/Q114901","display_name":"Gate array","level":3,"score":0.5013048648834229},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.46753308176994324},{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.4399524927139282},{"id":"https://openalex.org/C2780595030","wikidata":"https://www.wikidata.org/wiki/Q3860309","display_name":"Multiplication (music)","level":2,"score":0.41691142320632935},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3917856216430664},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.34627312421798706},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.3187938928604126},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.286879301071167},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.12879976630210876},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.09597200155258179},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/sips.2014.6986088","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sips.2014.6986088","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE Workshop on Signal Processing Systems (SiPS)","raw_type":"proceedings-article"},{"id":"pmh:oai:uwspace.uwaterloo.ca:10012/8456","is_oa":false,"landing_page_url":"http://hdl.handle.net/10012/8456","pdf_url":null,"source":{"id":"https://openalex.org/S4306401661","display_name":"UWSpace (University of Waterloo)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I151746483","host_organization_name":"University of Waterloo","host_organization_lineage":["https://openalex.org/I151746483"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Master Thesis"},{"id":"pmh:oai:zenodo.org:1280220","is_oa":true,"landing_page_url":"https://zenodo.org/record/1280220","pdf_url":null,"source":{"id":"https://openalex.org/S4306400562","display_name":"Zenodo (CERN European Organization for Nuclear Research)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I67311998","host_organization_name":"European Organization for Nuclear Research","host_organization_lineage":["https://openalex.org/I67311998"],"host_organization_lineage_names":[],"type":"repository"},"license":"public-domain","license_id":"https://openalex.org/licenses/public-domain","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferencePaper"}],"best_oa_location":{"id":"pmh:oai:zenodo.org:1280220","is_oa":true,"landing_page_url":"https://zenodo.org/record/1280220","pdf_url":null,"source":{"id":"https://openalex.org/S4306400562","display_name":"Zenodo (CERN European Organization for Nuclear Research)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I67311998","host_organization_name":"European Organization for Nuclear Research","host_organization_lineage":["https://openalex.org/I67311998"],"host_organization_lineage_names":[],"type":"repository"},"license":"public-domain","license_id":"https://openalex.org/licenses/public-domain","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferencePaper"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.6499999761581421,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W1570304560","https://openalex.org/W1602268444","https://openalex.org/W1975528831","https://openalex.org/W1976751132","https://openalex.org/W1979851451","https://openalex.org/W2019751845","https://openalex.org/W2055447293","https://openalex.org/W2055971177","https://openalex.org/W2061964274","https://openalex.org/W2105050988","https://openalex.org/W2114997074","https://openalex.org/W2120150623","https://openalex.org/W2121074861","https://openalex.org/W2123530431","https://openalex.org/W2128765501","https://openalex.org/W2131239166","https://openalex.org/W2133068391","https://openalex.org/W2135764410","https://openalex.org/W2140211600","https://openalex.org/W2144024329","https://openalex.org/W2156938362","https://openalex.org/W2341277784","https://openalex.org/W2497735908","https://openalex.org/W3152750074","https://openalex.org/W4256648168"],"related_works":["https://openalex.org/W4390550886","https://openalex.org/W3217463396","https://openalex.org/W2790557758","https://openalex.org/W2516396101","https://openalex.org/W3204929712","https://openalex.org/W2144444173","https://openalex.org/W2136827374","https://openalex.org/W3208151864","https://openalex.org/W1989667267","https://openalex.org/W2575872241"],"abstract_inverted_index":{"This":[0],"paper":[1],"demonstrates":[2],"a":[3,12],"clockless":[4],"stochastic":[5],"low-density":[6],"parity-check":[7],"(LDPC)":[8],"decoder":[9,48],"implemented":[10,66],"on":[11,67],"Field-Programmable":[13],"Gate":[14],"Array":[15],"(FPGA).":[16],"Stochastic":[17],"computing":[18],"reduces":[19],"the":[20,44,47,51,75],"wiring":[21],"complexity":[22],"necessary":[23],"for":[24,53,86],"decoding":[25,42,61],"by":[26,49],"replacing":[27],"operations":[28],"such":[29],"as":[30],"multiplication":[31],"and":[32,38,74,81,88],"division":[33],"with":[34],"simple":[35],"logic":[36],"gates":[37],"serial":[39],"processing.":[40],"Clockless":[41],"increases":[43],"throughput":[45],"of":[46],"eliminating":[50],"requirement":[52],"node":[54],"signals":[55],"to":[56],"be":[57],"synchronized":[58],"after":[59],"each":[60],"cycle.":[62],"The":[63],"design":[64],"is":[65],"an":[68],"ALTERA":[69],"Stratix":[70],"IV":[71],"EP4SGX230":[72],"FPGA":[73],"frame":[76],"error":[77],"rate":[78],"(FER),":[79],"throughput,":[80],"power":[82],"performance":[83],"are":[84],"presented":[85],"(96,48)":[87],"(204,102)":[89],"LDPC":[90],"decoders.":[91]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2016,"cited_by_count":3}],"updated_date":"2026-03-20T23:20:44.827607","created_date":"2025-10-10T00:00:00"}
