{"id":"https://openalex.org/W2035274991","doi":"https://doi.org/10.1109/sips.2014.6986083","title":"Software polar decoder on an embedded processor","display_name":"Software polar decoder on an embedded processor","publication_year":2014,"publication_date":"2014-10-01","ids":{"openalex":"https://openalex.org/W2035274991","doi":"https://doi.org/10.1109/sips.2014.6986083","mag":"2035274991"},"language":"en","primary_location":{"id":"doi:10.1109/sips.2014.6986083","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sips.2014.6986083","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE Workshop on Signal Processing Systems (SiPS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5079950326","display_name":"Bertrand Le Gal","orcid":"https://orcid.org/0000-0003-2269-8756"},"institutions":[{"id":"https://openalex.org/I4210160189","display_name":"Institut Polytechnique de Bordeaux","ror":"https://ror.org/054qv7y42","country_code":"FR","type":"education","lineage":["https://openalex.org/I4210160189"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"Bertrand Le Gal","raw_affiliation_strings":["IMS Laboratory, Institut Polytechnique de Bordeaux, Talence, France"],"affiliations":[{"raw_affiliation_string":"IMS Laboratory, Institut Polytechnique de Bordeaux, Talence, France","institution_ids":["https://openalex.org/I4210160189"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000320277","display_name":"Camille Leroux","orcid":"https://orcid.org/0000-0002-4984-3485"},"institutions":[{"id":"https://openalex.org/I4210160189","display_name":"Institut Polytechnique de Bordeaux","ror":"https://ror.org/054qv7y42","country_code":"FR","type":"education","lineage":["https://openalex.org/I4210160189"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Camille Leroux","raw_affiliation_strings":["IMS Laboratory, Institut Polytechnique de Bordeaux, Talence, France"],"affiliations":[{"raw_affiliation_string":"IMS Laboratory, Institut Polytechnique de Bordeaux, Talence, France","institution_ids":["https://openalex.org/I4210160189"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5031142198","display_name":"Christophe J\u00e9go","orcid":"https://orcid.org/0000-0001-5964-6277"},"institutions":[{"id":"https://openalex.org/I4210160189","display_name":"Institut Polytechnique de Bordeaux","ror":"https://ror.org/054qv7y42","country_code":"FR","type":"education","lineage":["https://openalex.org/I4210160189"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Christophe Jego","raw_affiliation_strings":["IMS Laboratory, Institut Polytechnique de Bordeaux, Talence, France"],"affiliations":[{"raw_affiliation_string":"IMS Laboratory, Institut Polytechnique de Bordeaux, Talence, France","institution_ids":["https://openalex.org/I4210160189"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5079950326"],"corresponding_institution_ids":["https://openalex.org/I4210160189"],"apc_list":null,"apc_paid":null,"fwci":1.3792,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":{"value":0.83533255,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10125","display_name":"Advanced Wireless Communication Techniques","score":0.9890999794006348,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12029","display_name":"DNA and Biological Computing","score":0.9767000079154968,"subfield":{"id":"https://openalex.org/subfields/1312","display_name":"Molecular Biology"},"field":{"id":"https://openalex.org/fields/13","display_name":"Biochemistry, Genetics and Molecular Biology"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8442655205726624},{"id":"https://openalex.org/keywords/soft-decision-decoder","display_name":"Soft-decision decoder","score":0.6185680031776428},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6133188605308533},{"id":"https://openalex.org/keywords/multithreading","display_name":"Multithreading","score":0.5858232975006104},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.5459659099578857},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.490105003118515},{"id":"https://openalex.org/keywords/memory-footprint","display_name":"Memory footprint","score":0.48114049434661865},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.47989046573638916},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.45493870973587036},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.4274202883243561},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4272739589214325},{"id":"https://openalex.org/keywords/video-decoder","display_name":"Video decoder","score":0.41329723596572876},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3946661055088043},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.14181724190711975},{"id":"https://openalex.org/keywords/thread","display_name":"Thread (computing)","score":0.1188211441040039},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.08856377005577087}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8442655205726624},{"id":"https://openalex.org/C185588885","wikidata":"https://www.wikidata.org/wiki/Q7553811","display_name":"Soft-decision decoder","level":3,"score":0.6185680031776428},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6133188605308533},{"id":"https://openalex.org/C201410400","wikidata":"https://www.wikidata.org/wiki/Q1064412","display_name":"Multithreading","level":3,"score":0.5858232975006104},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.5459659099578857},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.490105003118515},{"id":"https://openalex.org/C74912251","wikidata":"https://www.wikidata.org/wiki/Q6815727","display_name":"Memory footprint","level":2,"score":0.48114049434661865},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.47989046573638916},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.45493870973587036},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.4274202883243561},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4272739589214325},{"id":"https://openalex.org/C2776580754","wikidata":"https://www.wikidata.org/wiki/Q25098614","display_name":"Video decoder","level":3,"score":0.41329723596572876},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3946661055088043},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.14181724190711975},{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.1188211441040039},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.08856377005577087},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/sips.2014.6986083","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sips.2014.6986083","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE Workshop on Signal Processing Systems (SiPS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1568194405","https://openalex.org/W1600301286","https://openalex.org/W2003204237","https://openalex.org/W2010365725","https://openalex.org/W2033234285","https://openalex.org/W2035746421","https://openalex.org/W2051040090","https://openalex.org/W2051270424","https://openalex.org/W2071727855","https://openalex.org/W2084346236","https://openalex.org/W2134750166","https://openalex.org/W2144068311","https://openalex.org/W2150498905","https://openalex.org/W2155995390","https://openalex.org/W2163509114","https://openalex.org/W2240547622","https://openalex.org/W2541614469","https://openalex.org/W6653028443","https://openalex.org/W6671816445"],"related_works":["https://openalex.org/W2023452106","https://openalex.org/W1966690211","https://openalex.org/W2097330922","https://openalex.org/W2103261828","https://openalex.org/W2312443315","https://openalex.org/W2351326916","https://openalex.org/W2507780640","https://openalex.org/W2133675875","https://openalex.org/W4320502881","https://openalex.org/W2160792502"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"the":[3,50,53,66,69,86,97,100,104,108,115,146],"software":[4,130],"implementation":[5,118],"of":[6,18,52,59,68,85,110,119,137,145],"a":[7,29,78,120,135],"Polar":[8],"Codes":[9],"decoder":[10,32,73,88,122,131],"on":[11,33,77,123,151],"an":[12,34,124],"embedded":[13,35,125,152],"processor.":[14,37,82],"An":[15],"efficient":[16],"use":[17],"computation":[19],"and":[20,41,91,103],"memory":[21],"resource":[22],"is":[23,62,75,89,114],"made":[24],"in":[25,46],"order":[26,47],"to":[27,48,64],"devise":[28],"fast":[30],"polar":[31,121],"ARM":[36,60,81],"Memory":[38],"footprint":[39],"reduction":[40],"algorithmic":[42],"simplifications":[43],"are":[44],"applied":[45],"increase":[49],"throughput":[51,84],"decoder.":[54],"The":[55,71,83,128],"NEON":[56],"instruction":[57],"set":[58],"processors":[61],"used":[63],"exploit":[65],"parallelism":[67],"algorithm.":[70],"resulting":[72,87],"description":[74],"implemented":[76,150],"Cortex":[79],"A9":[80],"reported":[90,117],"discussed":[92],"for":[93,134],"several":[94],"parameters":[95],":":[96],"code":[98,101],"rate,":[99],"length":[102],"multithreading":[105],"mode.":[106],"To":[107],"best":[109],"our":[111],"knowledge,":[112],"this":[113],"first":[116],"processor":[126],"core.":[127],"proposed":[129],"reaches":[132],">100Mbps":[133],"codelength":[136],"16K.":[138],"Moreover,":[139],"it":[140],"compares":[141],"favorably":[142],"with":[143],"state":[144],"art":[147],"LDPC":[148],"decoders":[149],"processors.":[153]},"counts_by_year":[{"year":2022,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":4},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2016-06-24T00:00:00"}