{"id":"https://openalex.org/W2103641042","doi":"https://doi.org/10.1109/sips.2011.6088963","title":"Improved analytical delay models for coupled interconnects","display_name":"Improved analytical delay models for coupled interconnects","publication_year":2011,"publication_date":"2011-10-01","ids":{"openalex":"https://openalex.org/W2103641042","doi":"https://doi.org/10.1109/sips.2011.6088963","mag":"2103641042"},"language":"en","primary_location":{"id":"doi:10.1109/sips.2011.6088963","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sips.2011.6088963","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 IEEE Workshop on Signal Processing Systems (SiPS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5024400429","display_name":"Feng Shi","orcid":"https://orcid.org/0000-0001-8870-5408"},"institutions":[{"id":"https://openalex.org/I186143895","display_name":"Lehigh University","ror":"https://ror.org/012afjb06","country_code":"US","type":"education","lineage":["https://openalex.org/I186143895"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Feng Shi","raw_affiliation_strings":["Department of ECE, Lehigh University, Bethlehem, PA, USA","Dept. of ECE, Lehigh University, Bethlehem, PA, 18015"],"affiliations":[{"raw_affiliation_string":"Department of ECE, Lehigh University, Bethlehem, PA, USA","institution_ids":["https://openalex.org/I186143895"]},{"raw_affiliation_string":"Dept. of ECE, Lehigh University, Bethlehem, PA, 18015","institution_ids":["https://openalex.org/I186143895"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013653082","display_name":"Xuebin Wu","orcid":null},"institutions":[{"id":"https://openalex.org/I186143895","display_name":"Lehigh University","ror":"https://ror.org/012afjb06","country_code":"US","type":"education","lineage":["https://openalex.org/I186143895"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Xuebin Wu","raw_affiliation_strings":["Department of ECE, Lehigh University, Bethlehem, PA, USA","Dept. of ECE, Lehigh University, Bethlehem, PA, 18015"],"affiliations":[{"raw_affiliation_string":"Department of ECE, Lehigh University, Bethlehem, PA, USA","institution_ids":["https://openalex.org/I186143895"]},{"raw_affiliation_string":"Dept. of ECE, Lehigh University, Bethlehem, PA, 18015","institution_ids":["https://openalex.org/I186143895"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101582861","display_name":"Zhiyuan Yan","orcid":"https://orcid.org/0000-0003-2286-2771"},"institutions":[{"id":"https://openalex.org/I186143895","display_name":"Lehigh University","ror":"https://ror.org/012afjb06","country_code":"US","type":"education","lineage":["https://openalex.org/I186143895"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Zhiyuan Yan","raw_affiliation_strings":["Department of ECE, Lehigh University, Bethlehem, PA, USA","Dept. of ECE, Lehigh University, Bethlehem, PA, 18015"],"affiliations":[{"raw_affiliation_string":"Department of ECE, Lehigh University, Bethlehem, PA, USA","institution_ids":["https://openalex.org/I186143895"]},{"raw_affiliation_string":"Dept. of ECE, Lehigh University, Bethlehem, PA, 18015","institution_ids":["https://openalex.org/I186143895"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5024400429"],"corresponding_institution_ids":["https://openalex.org/I186143895"],"apc_list":null,"apc_paid":null,"fwci":0.5299,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.7113792,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"2","issue":null,"first_page":"134","last_page":"139"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/crosstalk","display_name":"Crosstalk","score":0.8273440003395081},{"id":"https://openalex.org/keywords/bottleneck","display_name":"Bottleneck","score":0.7294934391975403},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.667902410030365},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5881096720695496},{"id":"https://openalex.org/keywords/propagation-delay","display_name":"Propagation delay","score":0.5019655227661133},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.4997694492340088},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.22251975536346436},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2143452763557434},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.17963790893554688}],"concepts":[{"id":"https://openalex.org/C169822122","wikidata":"https://www.wikidata.org/wiki/Q230187","display_name":"Crosstalk","level":2,"score":0.8273440003395081},{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.7294934391975403},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.667902410030365},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5881096720695496},{"id":"https://openalex.org/C90806461","wikidata":"https://www.wikidata.org/wiki/Q1144416","display_name":"Propagation delay","level":2,"score":0.5019655227661133},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.4997694492340088},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.22251975536346436},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2143452763557434},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.17963790893554688}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/sips.2011.6088963","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sips.2011.6088963","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 IEEE Workshop on Signal Processing Systems (SiPS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W1507269286","https://openalex.org/W1974042317","https://openalex.org/W1974583787","https://openalex.org/W2007380193","https://openalex.org/W2066910438","https://openalex.org/W2101772490","https://openalex.org/W2107554324","https://openalex.org/W2108368155","https://openalex.org/W2110477661","https://openalex.org/W2111183063","https://openalex.org/W2122401630","https://openalex.org/W2123692429","https://openalex.org/W2144406075","https://openalex.org/W2144493049","https://openalex.org/W2150435291","https://openalex.org/W2153558271","https://openalex.org/W2165208933","https://openalex.org/W2170722955","https://openalex.org/W3143002681","https://openalex.org/W4247380242","https://openalex.org/W4247970051","https://openalex.org/W4247998816","https://openalex.org/W4249751941","https://openalex.org/W4252202715","https://openalex.org/W6678425368","https://openalex.org/W6684860212","https://openalex.org/W6829636747"],"related_works":["https://openalex.org/W2595172197","https://openalex.org/W2084856301","https://openalex.org/W1551902604","https://openalex.org/W2382017866","https://openalex.org/W2382989213","https://openalex.org/W2139145693","https://openalex.org/W2171186885","https://openalex.org/W2081082331","https://openalex.org/W2922086473","https://openalex.org/W2469851346"],"abstract_inverted_index":{"With":[0],"the":[1,4,26,79],"advance":[2],"of":[3,15],"process":[5],"technologies":[6],"into":[7],"deep":[8],"sub-micrometer":[9],"domain,":[10],"crosstalk":[11,27,41,66],"between":[12],"adjacent":[13],"wires":[14],"global":[16,37],"interconnects":[17],"has":[18,88],"become":[19],"more":[20,53],"severe.":[21],"The":[22],"delay":[23,44,98],"caused":[24],"by":[25,83],"becomes":[28],"a":[29],"bottleneck":[30],"to":[31,60,64],"system":[32],"performance,":[33],"especially":[34],"those":[35],"with":[36],"interconnects.":[38],"To":[39],"alleviate":[40],"delays,":[42],"accurate":[43],"models":[45,51],"are":[46,52,76],"needed.":[47],"In":[48,91],"particular,":[49],"analytical":[50,80,97],"desirable":[54],"for":[55],"their":[56],"simplicity":[57],"and":[58,100],"transparency":[59],"technology,":[61],"which":[62,87],"lead":[63],"efficient":[65],"avoidance":[67],"code":[68],"(CAC)":[69],"designs.":[70],"Currently,":[71],"most":[72],"existing":[73],"CAC":[74],"designs":[75],"based":[77],"on":[78],"model":[81],"proposed":[82],"Sotiriadis":[84],"et":[85],"al.,":[86],"limited":[89],"accuracy.":[90,109],"this":[92],"paper,":[93],"we":[94],"propose":[95],"new":[96],"models,":[99],"our":[101],"extensive":[102],"simulations":[103],"show":[104],"that":[105],"they":[106],"have":[107],"improved":[108]},"counts_by_year":[{"year":2015,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}