{"id":"https://openalex.org/W1996999528","doi":"https://doi.org/10.1109/sips.2011.6088947","title":"Optimization of portable parallel signal processing applications by design space exploration of dataflow programs","display_name":"Optimization of portable parallel signal processing applications by design space exploration of dataflow programs","publication_year":2011,"publication_date":"2011-10-01","ids":{"openalex":"https://openalex.org/W1996999528","doi":"https://doi.org/10.1109/sips.2011.6088947","mag":"1996999528"},"language":"en","primary_location":{"id":"doi:10.1109/sips.2011.6088947","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sips.2011.6088947","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 IEEE Workshop on Signal Processing Systems (SiPS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://infoscience.epfl.ch/record/173457","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5037961095","display_name":"Christophe Lucarz","orcid":null},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":true,"raw_author_name":"Christophe Lucarz","raw_affiliation_strings":["\u00e8cole Polytechnique F\u00e9d\u00e9rate de Lausanne, Switzerland","\u00c9cole Polytechnique, F\u00e9d\u00e9rale de Lausanne#TAB#"],"affiliations":[{"raw_affiliation_string":"\u00e8cole Polytechnique F\u00e9d\u00e9rate de Lausanne, Switzerland","institution_ids":["https://openalex.org/I5124864"]},{"raw_affiliation_string":"\u00c9cole Polytechnique, F\u00e9d\u00e9rale de Lausanne#TAB#","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013188524","display_name":"Marco Mattavelli","orcid":"https://orcid.org/0000-0002-7742-0332"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Marco Mattavelli","raw_affiliation_strings":["\u00e8cole Polytechnique F\u00e9d\u00e9rate de Lausanne, Switzerland","\u00c9cole Polytechnique, F\u00e9d\u00e9rale de Lausanne#TAB#"],"affiliations":[{"raw_affiliation_string":"\u00e8cole Polytechnique F\u00e9d\u00e9rate de Lausanne, Switzerland","institution_ids":["https://openalex.org/I5124864"]},{"raw_affiliation_string":"\u00c9cole Polytechnique, F\u00e9d\u00e9rale de Lausanne#TAB#","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5065449878","display_name":"J\u00f6rn W. Janneck","orcid":null},"institutions":[{"id":"https://openalex.org/I4210150153","display_name":"Lund Science (Sweden)","ror":"https://ror.org/04sdy1r02","country_code":"SE","type":"company","lineage":["https://openalex.org/I4210150153"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"Jorn W. Janneck","raw_affiliation_strings":["Lund Institute of Technology, Sweden","Lund Institute of Technology"],"affiliations":[{"raw_affiliation_string":"Lund Institute of Technology, Sweden","institution_ids":["https://openalex.org/I4210150153"]},{"raw_affiliation_string":"Lund Institute of Technology","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5037961095"],"corresponding_institution_ids":["https://openalex.org/I5124864"],"apc_list":null,"apc_paid":null,"fwci":1.2839,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.80767814,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"43","last_page":"48"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dataflow","display_name":"Dataflow","score":0.9492536783218384},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8407101631164551},{"id":"https://openalex.org/keywords/software-portability","display_name":"Software portability","score":0.8275672793388367},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.7971262335777283},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5826104879379272},{"id":"https://openalex.org/keywords/code-refactoring","display_name":"Code refactoring","score":0.5485402941703796},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5400155186653137},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.5378113985061646},{"id":"https://openalex.org/keywords/parallelism","display_name":"Parallelism (grammar)","score":0.493554949760437},{"id":"https://openalex.org/keywords/stream-processing","display_name":"Stream processing","score":0.4810188412666321},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.4731508493423462},{"id":"https://openalex.org/keywords/parallel-processing","display_name":"Parallel processing","score":0.44859468936920166},{"id":"https://openalex.org/keywords/dataflow-architecture","display_name":"Dataflow architecture","score":0.4440966844558716},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.3798064887523651},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.37018516659736633},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.30553585290908813},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.3049628734588623},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2505705952644348},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.19369861483573914}],"concepts":[{"id":"https://openalex.org/C96324660","wikidata":"https://www.wikidata.org/wiki/Q205446","display_name":"Dataflow","level":2,"score":0.9492536783218384},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8407101631164551},{"id":"https://openalex.org/C63000827","wikidata":"https://www.wikidata.org/wiki/Q3080428","display_name":"Software portability","level":2,"score":0.8275672793388367},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.7971262335777283},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5826104879379272},{"id":"https://openalex.org/C152752567","wikidata":"https://www.wikidata.org/wiki/Q116877","display_name":"Code refactoring","level":3,"score":0.5485402941703796},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5400155186653137},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.5378113985061646},{"id":"https://openalex.org/C2781172179","wikidata":"https://www.wikidata.org/wiki/Q853109","display_name":"Parallelism (grammar)","level":2,"score":0.493554949760437},{"id":"https://openalex.org/C107027933","wikidata":"https://www.wikidata.org/wiki/Q2006448","display_name":"Stream processing","level":2,"score":0.4810188412666321},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.4731508493423462},{"id":"https://openalex.org/C106515295","wikidata":"https://www.wikidata.org/wiki/Q26806595","display_name":"Parallel processing","level":2,"score":0.44859468936920166},{"id":"https://openalex.org/C176727019","wikidata":"https://www.wikidata.org/wiki/Q1172415","display_name":"Dataflow architecture","level":3,"score":0.4440966844558716},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.3798064887523651},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.37018516659736633},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.30553585290908813},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.3049628734588623},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2505705952644348},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.19369861483573914}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/sips.2011.6088947","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sips.2011.6088947","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 IEEE Workshop on Signal Processing Systems (SiPS)","raw_type":"proceedings-article"},{"id":"pmh:oai:infoscience.epfl.ch:173457","is_oa":true,"landing_page_url":"http://infoscience.epfl.ch/record/173457","pdf_url":null,"source":{"id":"https://openalex.org/S4306400487","display_name":"Infoscience (Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Text"},{"id":"pmh:oai:lup.lub.lu.se:5b8ae8e2-fcfe-471c-b26a-bf08ae9f93dc","is_oa":false,"landing_page_url":"https://lup.lub.lu.se/record/2224817","pdf_url":null,"source":{"id":"https://openalex.org/S4306400536","display_name":"Lund University Publications (Lund University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I187531555","host_organization_name":"Lund University","host_organization_lineage":["https://openalex.org/I187531555"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"ISSN: 2162-3562","raw_type":"text"}],"best_oa_location":{"id":"pmh:oai:infoscience.epfl.ch:173457","is_oa":true,"landing_page_url":"http://infoscience.epfl.ch/record/173457","pdf_url":null,"source":{"id":"https://openalex.org/S4306400487","display_name":"Infoscience (Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Text"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1835667143","https://openalex.org/W1849568040","https://openalex.org/W2029823978","https://openalex.org/W2132919235","https://openalex.org/W4300409462","https://openalex.org/W6638622468"],"related_works":["https://openalex.org/W2077180914","https://openalex.org/W1989140795","https://openalex.org/W1997547023","https://openalex.org/W2172339343","https://openalex.org/W2521218765","https://openalex.org/W2971894545","https://openalex.org/W1741246166","https://openalex.org/W4220813584","https://openalex.org/W2403307847","https://openalex.org/W1981433684"],"abstract_inverted_index":{"This":[0],"paper":[1,48],"describes":[2],"a":[3,23,50,64],"methodology":[4,54,100],"for":[5,26,55],"the":[6,38,43,67,82,88],"optimization":[7],"of":[8,20,45,63,71,87,110],"portable":[9],"parallel":[10,31,97],"signal":[11,27,89],"processing":[12,28,90],"applications":[13,29,91],"specified":[14],"by":[15],"dataflow":[16,21],"programs.":[17],"The":[18,47,99],"use":[19],"as":[22],"programming":[24,41],"model":[25],"targeting":[30],"platforms":[32],"provides":[33],"an":[34,106,111],"important":[35],"advantage":[36],"versus":[37],"traditional":[39],"sequential":[40],"paradigm:":[42],"portability":[44],"parallelism.":[46],"introduce":[49],"design":[51],"space":[52],"exploration":[53],"exploring":[56],"alternative":[57],"implementations":[58],"in":[59,105],"which":[60],"abstract":[61],"traces":[62],"program,":[65],"representing":[66],"actual":[68],"data":[69],"dependencies":[70],"its":[72,95],"parts,":[73],"are":[74],"first":[75],"constructed":[76],"and":[77,84,86,103],"then":[78],"analyzed":[79],"to":[80,92],"guide":[81],"refactoring":[83],"mapping":[85],"best":[93],"match":[94],"intended":[96],"target.":[98],"is":[101],"demonstrated":[102],"evaluated":[104],"at-size":[107],"case":[108],"study":[109],"MPEG-4":[112],"video":[113],"decoder.":[114]},"counts_by_year":[{"year":2015,"cited_by_count":1},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":3}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}