{"id":"https://openalex.org/W2161818018","doi":"https://doi.org/10.1109/sips.2009.5336244","title":"Implementation of the W-CDMA cell search on a MPSOC designed for software defined radios","display_name":"Implementation of the W-CDMA cell search on a MPSOC designed for software defined radios","publication_year":2009,"publication_date":"2009-10-01","ids":{"openalex":"https://openalex.org/W2161818018","doi":"https://doi.org/10.1109/sips.2009.5336244","mag":"2161818018"},"language":"en","primary_location":{"id":"doi:10.1109/sips.2009.5336244","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sips.2009.5336244","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE Workshop on Signal Processing Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5056978552","display_name":"Fabio Garzia","orcid":"https://orcid.org/0000-0003-2597-4429"},"institutions":[{"id":"https://openalex.org/I4210133110","display_name":"Tampere University","ror":null,"country_code":"FI","type":null,"lineage":["https://openalex.org/I4210133110"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"Fabio Garzia","raw_affiliation_strings":["Department of Computer Systems, Tampere University of Technology, Tampere, Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Systems, Tampere University of Technology, Tampere, Finland","institution_ids":["https://openalex.org/I4210133110"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049758849","display_name":"Roberto Airoldi","orcid":null},"institutions":[{"id":"https://openalex.org/I4210133110","display_name":"Tampere University","ror":null,"country_code":"FI","type":null,"lineage":["https://openalex.org/I4210133110"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"Roberto Airoldi","raw_affiliation_strings":["Department of Computer Systems, Tampere University of Technology, Tampere, Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Systems, Tampere University of Technology, Tampere, Finland","institution_ids":["https://openalex.org/I4210133110"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081481126","display_name":"Tapani Ahonen","orcid":"https://orcid.org/0000-0003-0304-8790"},"institutions":[{"id":"https://openalex.org/I4210133110","display_name":"Tampere University","ror":null,"country_code":"FI","type":null,"lineage":["https://openalex.org/I4210133110"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"Tapani Ahonen","raw_affiliation_strings":["Department of Computer Systems, Tampere University of Technology, Tampere, Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Systems, Tampere University of Technology, Tampere, Finland","institution_ids":["https://openalex.org/I4210133110"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035297149","display_name":"Jari Nurmi","orcid":"https://orcid.org/0000-0003-2169-4606"},"institutions":[{"id":"https://openalex.org/I4210133110","display_name":"Tampere University","ror":null,"country_code":"FI","type":null,"lineage":["https://openalex.org/I4210133110"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"Jari Nurmi","raw_affiliation_strings":["Department of Computer Systems, Tampere University of Technology, Tampere, Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Systems, Tampere University of Technology, Tampere, Finland","institution_ids":["https://openalex.org/I4210133110"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5056611420","display_name":"Dragomir Milojevic","orcid":"https://orcid.org/0000-0001-5915-5160"},"institutions":[{"id":"https://openalex.org/I132053463","display_name":"Universit\u00e9 Libre de Bruxelles","ror":"https://ror.org/01r9htc13","country_code":"BE","type":"education","lineage":["https://openalex.org/I132053463"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Dragomir Milojevic","raw_affiliation_strings":["Bio, Electro and Mechanical Systems, Universit\u00e9 Libre de Bruxelles, Brussels, Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Bio, Electro and Mechanical Systems, Universit\u00e9 Libre de Bruxelles, Brussels, Belgium","institution_ids":["https://openalex.org/I132053463"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.4249,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.84573432,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"18","issue":null,"first_page":"030","last_page":"035"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10575","display_name":"Wireless Communication Networks Research","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10575","display_name":"Wireless Communication Networks Research","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10125","display_name":"Advanced Wireless Communication Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":0.9958999752998352,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/mpsoc","display_name":"MPSoC","score":0.7407646179199219},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7296627759933472},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6365236639976501},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.6253036260604858},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.6116423010826111},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.4973764717578888},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.48638442158699036},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.47571641206741333},{"id":"https://openalex.org/keywords/code-division-multiple-access","display_name":"Code division multiple access","score":0.460460901260376},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4439980387687683},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.41763561964035034},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.37660008668899536},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3255392014980316},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.13425606489181519},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1101807951927185},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.10893666744232178}],"concepts":[{"id":"https://openalex.org/C2777187653","wikidata":"https://www.wikidata.org/wiki/Q975106","display_name":"MPSoC","level":3,"score":0.7407646179199219},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7296627759933472},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6365236639976501},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.6253036260604858},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.6116423010826111},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.4973764717578888},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.48638442158699036},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.47571641206741333},{"id":"https://openalex.org/C47696715","wikidata":"https://www.wikidata.org/wiki/Q233394","display_name":"Code division multiple access","level":2,"score":0.460460901260376},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4439980387687683},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.41763561964035034},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.37660008668899536},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3255392014980316},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.13425606489181519},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1101807951927185},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.10893666744232178}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/sips.2009.5336244","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sips.2009.5336244","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE Workshop on Signal Processing Systems","raw_type":"proceedings-article"},{"id":"pmh:oai:dipot.ulb.ac.be:2013/69288","is_oa":false,"landing_page_url":"http://hdl.handle.net/2013/ULB-DIPOT:oai:dipot.ulb.ac.be:2013/69288","pdf_url":null,"source":{"id":"https://openalex.org/S4306401063","display_name":"D\u00e9p\u00f4t institutionnel de l'Universit\u00e9 libre de Bruxelles (Universit\u00e9 Libre de Bruxelles)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I132053463","host_organization_name":"Universit\u00e9 Libre de Bruxelles","host_organization_lineage":["https://openalex.org/I132053463"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W7324480","https://openalex.org/W1569911644","https://openalex.org/W1808734864","https://openalex.org/W1831760944","https://openalex.org/W2098285910","https://openalex.org/W2101678984","https://openalex.org/W2115049487","https://openalex.org/W2135639276","https://openalex.org/W2141586470","https://openalex.org/W2145486224","https://openalex.org/W2164643445","https://openalex.org/W2994718367","https://openalex.org/W6638456978","https://openalex.org/W6677452492"],"related_works":["https://openalex.org/W2502691491","https://openalex.org/W1976012348","https://openalex.org/W2002682434","https://openalex.org/W2137671689","https://openalex.org/W4387782849","https://openalex.org/W2113449380","https://openalex.org/W2012131147","https://openalex.org/W2157008728","https://openalex.org/W2092587530","https://openalex.org/W2016942572"],"abstract_inverted_index":{"This":[0],"paper":[1],"describes":[2],"the":[3,38,41,53,56,77,81,94,101,104],"implementation":[4],"of":[5,22,40,55,63,97],"theW-CDMA":[6],"cell":[7,42,106],"search":[8,43,107],"algorithm":[9],"on":[10,26,37,47,113,125],"a":[11,60,69],"homogeneous":[12],"general":[13],"purpose":[14],"multi-processor":[15],"system-on-chip":[16],"architecture.":[17],"The":[18,34,86],"architecture":[19],"is":[20,88,108],"composed":[21],"nine":[23],"nodes":[24],"based":[25],"COFFEE":[27],"RISC":[28],"cores":[29],"communicating":[30],"using":[31],"hierarchical":[32],"network-on-chip.":[33,57],"work":[35],"focuses":[36],"parallelization":[39],"algorithm,":[44],"enabling":[45],"execution":[46],"different":[48,84],"processing":[49,71],"nodes,":[50],"and":[51,121],"exploiting":[52],"capabilities":[54],"We":[58],"achieved":[59],"total":[61],"speed-up":[62],"7.3":[64],"X":[65],"when":[66],"compared":[67],"with":[68,80,116,129],"single":[70],"core":[72],"system,":[73],"taking":[74],"into":[75],"account":[76],"overhead":[78],"related":[79],"communication":[82],"between":[83],"nodes.":[85],"result":[87],"significant":[89],"since":[90],"very":[91],"close":[92],"to":[93],"theoretical":[95],"maximum":[96,119,132],"9":[98],"X.":[99],"Considering":[100],"hardware":[102],"implementation,":[103],"target":[105],"performed":[109],"in":[110,122],"104":[111],"ms":[112,124],"an":[114,126],"FPGA":[115],"75":[117],"MHz":[118,131],"frequency,":[120],"40":[123],"ASIC":[127],"circuit":[128],"200":[130],"frequency.":[133]},"counts_by_year":[{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-02T09:51:11.867554","created_date":"2025-10-10T00:00:00"}