{"id":"https://openalex.org/W4238824660","doi":"https://doi.org/10.1109/simsym.2003.1192818","title":"Efficient microprocessor design space exploration through statistical simulation","display_name":"Efficient microprocessor design space exploration through statistical simulation","publication_year":2003,"publication_date":"2003-08-27","ids":{"openalex":"https://openalex.org/W4238824660","doi":"https://doi.org/10.1109/simsym.2003.1192818"},"language":"en","primary_location":{"id":"doi:10.1109/simsym.2003.1192818","is_oa":false,"landing_page_url":"https://doi.org/10.1109/simsym.2003.1192818","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"36th Annual Simulation Symposium, 2003.","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5007384269","display_name":"L. Eeckhout","orcid":null},"institutions":[{"id":"https://openalex.org/I32597200","display_name":"Ghent University","ror":"https://ror.org/00cv9y106","country_code":"BE","type":"education","lineage":["https://openalex.org/I32597200"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"L. Eeckhout","raw_affiliation_strings":["Department of Electronics and Information Systems, Ghent University, Ghent, Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Information Systems, Ghent University, Ghent, Belgium","institution_ids":["https://openalex.org/I32597200"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5024167837","display_name":"D. Stroobandt","orcid":null},"institutions":[{"id":"https://openalex.org/I32597200","display_name":"Ghent University","ror":"https://ror.org/00cv9y106","country_code":"BE","type":"education","lineage":["https://openalex.org/I32597200"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"D. Stroobandt","raw_affiliation_strings":["Department of Electronics and Information Systems, Ghent University, Ghent, Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Information Systems, Ghent University, Ghent, Belgium","institution_ids":["https://openalex.org/I32597200"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5022669577","display_name":"Koenraad De Bosschere","orcid":null},"institutions":[{"id":"https://openalex.org/I32597200","display_name":"Ghent University","ror":"https://ror.org/00cv9y106","country_code":"BE","type":"education","lineage":["https://openalex.org/I32597200"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"K. De Bosschere","raw_affiliation_strings":["Department of Electronics and Information Systems, Ghent University, Ghent, Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Information Systems, Ghent University, Ghent, Belgium","institution_ids":["https://openalex.org/I32597200"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I32597200"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"q1","issue":null,"first_page":"233","last_page":"240"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.8482428193092346},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.761431097984314},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.716748058795929},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6792555451393127},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.5141956806182861},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.47304195165634155},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.46857619285583496},{"id":"https://openalex.org/keywords/design-methods","display_name":"Design methods","score":0.42854025959968567},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.421234667301178},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4005432724952698},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.36767131090164185},{"id":"https://openalex.org/keywords/systems-engineering","display_name":"Systems engineering","score":0.351107656955719},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20612579584121704},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10287988185882568}],"concepts":[{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.8482428193092346},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.761431097984314},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.716748058795929},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6792555451393127},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.5141956806182861},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.47304195165634155},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.46857619285583496},{"id":"https://openalex.org/C138852830","wikidata":"https://www.wikidata.org/wiki/Q2292993","display_name":"Design methods","level":2,"score":0.42854025959968567},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.421234667301178},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4005432724952698},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.36767131090164185},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.351107656955719},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20612579584121704},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10287988185882568},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/simsym.2003.1192818","is_oa":false,"landing_page_url":"https://doi.org/10.1109/simsym.2003.1192818","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"36th Annual Simulation Symposium, 2003.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.6399999856948853}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W63944998","https://openalex.org/W1974872983","https://openalex.org/W2106270437","https://openalex.org/W2112692144","https://openalex.org/W2125829254","https://openalex.org/W2150111646","https://openalex.org/W2155470578","https://openalex.org/W2159617380","https://openalex.org/W3140903683","https://openalex.org/W3149179768","https://openalex.org/W3151027173","https://openalex.org/W4233932103","https://openalex.org/W4242167065","https://openalex.org/W6602613798","https://openalex.org/W6676715110","https://openalex.org/W6792941224","https://openalex.org/W6793011382","https://openalex.org/W6793626006"],"related_works":["https://openalex.org/W2037960874","https://openalex.org/W3139751470","https://openalex.org/W1567432572","https://openalex.org/W2072910550","https://openalex.org/W2151657833","https://openalex.org/W2121364018","https://openalex.org/W4235353373","https://openalex.org/W4230416644","https://openalex.org/W1502098592","https://openalex.org/W1550100726"],"abstract_inverted_index":{"To":[0],"cope":[1],"with":[2,59],"the":[3,7,22,28,39,77,83,111],"widening":[4],"design":[5,40,46,78,84,96,104,112],"gap,":[6],"ever":[8],"increasing":[9],"impact":[10],"of":[11,30,57,100,110],"technology,":[12],"reflected":[13],"in":[14,43,62,107],"increased":[15],"interconnect":[16],"delay":[17],"and":[18,21,67,82,119],"power":[19,65,117],"consumption,":[20],"time-consuming":[23],"simulations":[24],"needed":[25],"to":[26,37,53],"define":[27],"architecture":[29],"a":[31,55],"microprocessor,":[32],"computer":[33],"engineers":[34],"need":[35],"techniques":[36,49],"explore":[38],"space":[41,79],"efficiently":[42,106],"an":[44,94],"early":[45,95,108],"stage.":[47],"These":[48],"should":[50,73],"be":[51,74],"able":[52],"identify":[54],"region":[56],"interest":[58],"desirable":[60],"characteristics":[61],"terms":[63],"performance,":[64,116],"consumption":[66,118],"cycle":[68,120],"time.":[69,121],"In":[70],"addition,":[71],"they":[72],"fast":[75],"since":[76],"is":[80,86,93],"huge":[81],"time":[85],"limited.":[87],"We":[88],"demonstrate":[89],"that":[90],"statistical":[91],"simulation":[92],"stage":[97],"technique":[98],"capable":[99],"making":[101],"viable":[102],"microprocessor":[103],"decisions":[105],"stages":[109],"flow":[113],"while":[114],"considering":[115]},"counts_by_year":[{"year":2014,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}