{"id":"https://openalex.org/W1980898636","doi":"https://doi.org/10.1109/sies.2012.6356596","title":"LISPARC: Using an architecture description language approach for modelling an adaptive processor microarchitecture","display_name":"LISPARC: Using an architecture description language approach for modelling an adaptive processor microarchitecture","publication_year":2012,"publication_date":"2012-06-01","ids":{"openalex":"https://openalex.org/W1980898636","doi":"https://doi.org/10.1109/sies.2012.6356596","mag":"1980898636"},"language":"en","primary_location":{"id":"doi:10.1109/sies.2012.6356596","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sies.2012.6356596","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"7th IEEE International Symposium on Industrial Embedded Systems (SIES'12)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5036120083","display_name":"Carsten Tradowsky","orcid":null},"institutions":[{"id":"https://openalex.org/I102335020","display_name":"Karlsruhe Institute of Technology","ror":"https://ror.org/04t3en479","country_code":"DE","type":"education","lineage":["https://openalex.org/I102335020","https://openalex.org/I1305996414"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Carsten Tradowsky","raw_affiliation_strings":["Institute for Information Processing Technology (ITIV), Karlsruhe Institute of Technology, Germany","[Institute for Information Processing Technology (ITIV), Karlsruhe Institute of Technology (KIT)]"],"affiliations":[{"raw_affiliation_string":"Institute for Information Processing Technology (ITIV), Karlsruhe Institute of Technology, Germany","institution_ids":["https://openalex.org/I102335020"]},{"raw_affiliation_string":"[Institute for Information Processing Technology (ITIV), Karlsruhe Institute of Technology (KIT)]","institution_ids":["https://openalex.org/I102335020"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074407195","display_name":"Florian Thoma","orcid":null},"institutions":[{"id":"https://openalex.org/I102335020","display_name":"Karlsruhe Institute of Technology","ror":"https://ror.org/04t3en479","country_code":"DE","type":"education","lineage":["https://openalex.org/I102335020","https://openalex.org/I1305996414"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Florian Thoma","raw_affiliation_strings":["Institute for Information Processing Technology (ITIV), Karlsruhe Institute of Technology, Germany","[Institute for Information Processing Technology (ITIV), Karlsruhe Institute of Technology (KIT)]"],"affiliations":[{"raw_affiliation_string":"Institute for Information Processing Technology (ITIV), Karlsruhe Institute of Technology, Germany","institution_ids":["https://openalex.org/I102335020"]},{"raw_affiliation_string":"[Institute for Information Processing Technology (ITIV), Karlsruhe Institute of Technology (KIT)]","institution_ids":["https://openalex.org/I102335020"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108437484","display_name":"Michael H\u00fcbner","orcid":"https://orcid.org/0000-0003-3785-7959"},"institutions":[{"id":"https://openalex.org/I904495901","display_name":"Ruhr University Bochum","ror":"https://ror.org/04tsk2644","country_code":"DE","type":"education","lineage":["https://openalex.org/I904495901"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Michael Hubner","raw_affiliation_strings":["Embedded Systems in Information Technology (ESIT), Ruhr University of Bochum, Germany","Chair for Embedded Systems in Information Technology (ESIT), Ruhr-University Bochum"],"affiliations":[{"raw_affiliation_string":"Embedded Systems in Information Technology (ESIT), Ruhr University of Bochum, Germany","institution_ids":["https://openalex.org/I904495901"]},{"raw_affiliation_string":"Chair for Embedded Systems in Information Technology (ESIT), Ruhr-University Bochum","institution_ids":["https://openalex.org/I904495901"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5024739574","display_name":"J\u00fcrgen Becker","orcid":"https://orcid.org/0000-0002-5082-5487"},"institutions":[{"id":"https://openalex.org/I102335020","display_name":"Karlsruhe Institute of Technology","ror":"https://ror.org/04t3en479","country_code":"DE","type":"education","lineage":["https://openalex.org/I102335020","https://openalex.org/I1305996414"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Jurgen Becker","raw_affiliation_strings":["Institute for Information Processing Technology (ITIV), Karlsruhe Institute of Technology, Germany","[Institute for Information Processing Technology (ITIV), Karlsruhe Institute of Technology (KIT)]"],"affiliations":[{"raw_affiliation_string":"Institute for Information Processing Technology (ITIV), Karlsruhe Institute of Technology, Germany","institution_ids":["https://openalex.org/I102335020"]},{"raw_affiliation_string":"[Institute for Information Processing Technology (ITIV), Karlsruhe Institute of Technology (KIT)]","institution_ids":["https://openalex.org/I102335020"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5036120083"],"corresponding_institution_ids":["https://openalex.org/I102335020"],"apc_list":null,"apc_paid":null,"fwci":1.1602,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.7685029,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"279","last_page":"282"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8741970658302307},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.7843918204307556},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.7599681615829468},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.7219367623329163},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.7175019383430481},{"id":"https://openalex.org/keywords/application-specific-instruction-set-processor","display_name":"Application-specific instruction-set processor","score":0.6330994963645935},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.6164883375167847},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.5613409280776978},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.5512498617172241},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5025796890258789},{"id":"https://openalex.org/keywords/arm-architecture","display_name":"ARM architecture","score":0.4904896914958954},{"id":"https://openalex.org/keywords/architecture-description-language","display_name":"Architecture description language","score":0.42490363121032715},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3588317036628723},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.3105263411998749},{"id":"https://openalex.org/keywords/reference-architecture","display_name":"Reference architecture","score":0.2337675392627716},{"id":"https://openalex.org/keywords/software-architecture","display_name":"Software architecture","score":0.13728398084640503},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.10159242153167725}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8741970658302307},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.7843918204307556},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.7599681615829468},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.7219367623329163},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.7175019383430481},{"id":"https://openalex.org/C201736964","wikidata":"https://www.wikidata.org/wiki/Q621583","display_name":"Application-specific instruction-set processor","level":3,"score":0.6330994963645935},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.6164883375167847},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.5613409280776978},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.5512498617172241},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5025796890258789},{"id":"https://openalex.org/C26771161","wikidata":"https://www.wikidata.org/wiki/Q16980","display_name":"ARM architecture","level":2,"score":0.4904896914958954},{"id":"https://openalex.org/C185245429","wikidata":"https://www.wikidata.org/wiki/Q362356","display_name":"Architecture description language","level":5,"score":0.42490363121032715},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3588317036628723},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.3105263411998749},{"id":"https://openalex.org/C55356503","wikidata":"https://www.wikidata.org/wiki/Q2136675","display_name":"Reference architecture","level":4,"score":0.2337675392627716},{"id":"https://openalex.org/C35869016","wikidata":"https://www.wikidata.org/wiki/Q846636","display_name":"Software architecture","level":3,"score":0.13728398084640503},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.10159242153167725},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/sies.2012.6356596","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sies.2012.6356596","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"7th IEEE International Symposium on Industrial Embedded Systems (SIES'12)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.46000000834465027,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":23,"referenced_works":["https://openalex.org/W134049795","https://openalex.org/W1554765953","https://openalex.org/W1567646530","https://openalex.org/W1585971644","https://openalex.org/W1968655710","https://openalex.org/W1981305988","https://openalex.org/W1993588021","https://openalex.org/W2010074783","https://openalex.org/W2014714034","https://openalex.org/W2107923684","https://openalex.org/W2112537029","https://openalex.org/W2116553927","https://openalex.org/W2121844610","https://openalex.org/W2156088664","https://openalex.org/W2170256087","https://openalex.org/W2293877842","https://openalex.org/W2542693654","https://openalex.org/W3140458327","https://openalex.org/W3149144981","https://openalex.org/W4231183338","https://openalex.org/W4234251183","https://openalex.org/W4234669735","https://openalex.org/W6793222508"],"related_works":["https://openalex.org/W2047885859","https://openalex.org/W2036206036","https://openalex.org/W2189543321","https://openalex.org/W2125503095","https://openalex.org/W4308095153","https://openalex.org/W1980898636","https://openalex.org/W2768226460","https://openalex.org/W2026084820","https://openalex.org/W2883183116","https://openalex.org/W1988987900"],"abstract_inverted_index":{"In":[0],"today's":[1],"mobile":[2],"computers,":[3],"such":[4],"as":[5],"tablets":[6],"and":[7,12,47],"smart":[8],"phones,":[9],"power,":[10],"performance":[11],"chip":[13],"area":[14],"are":[15,39],"the":[16,20,31,42,60,68],"major":[17],"constraints":[18],"to":[19,57,78,80],"development":[21],"of":[22,33,44,86],"cost":[23],"efficient":[24,52],"high":[25],"tech":[26],"products.":[27],"One":[28],"solution":[29],"is":[30,63,88],"usage":[32],"application-specific":[34],"instruction-set":[35],"processors":[36],"(ASIP),":[37],"which":[38],"optimized":[40],"for":[41,97],"execution":[43],"special":[45],"tasks":[46],"thus":[48],"enable":[49],"a":[50],"more":[51,66],"implementation.":[53],"As":[54],"an":[55,91],"extension":[56],"this":[58],"approach":[59],"LISPARC":[61,69,87],"processor":[62,84],"developed.":[64],"For":[65],"flexibility,":[67],"model":[70,85],"enables":[71],"dynamic":[72],"reconfiguration":[73],"at":[74],"run-time":[75],"in":[76],"order":[77],"adapt":[79],"different":[81],"ASIPs.":[82],"The":[83],"described":[89],"using":[90],"architecture":[92],"description":[93],"language":[94],"called":[95],"Language":[96],"Instruction-Set":[98],"Architectures":[99],"(LISA).":[100]},"counts_by_year":[{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
