{"id":"https://openalex.org/W1963637299","doi":"https://doi.org/10.1109/sc.2010.53","title":"The 48-core SCC Processor: the Programmer's View","display_name":"The 48-core SCC Processor: the Programmer's View","publication_year":2010,"publication_date":"2010-11-01","ids":{"openalex":"https://openalex.org/W1963637299","doi":"https://doi.org/10.1109/sc.2010.53","mag":"1963637299"},"language":"en","primary_location":{"id":"doi:10.1109/sc.2010.53","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sc.2010.53","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 ACM/IEEE International Conference for High Performance Computing, Networking, Storage and Analysis","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5048097160","display_name":"Timothy G. Mattson","orcid":"https://orcid.org/0000-0002-6106-8717"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I1316910977","display_name":"DuPont (United States)","ror":"https://ror.org/03g3m1w62","country_code":"US","type":"company","lineage":["https://openalex.org/I1316910977"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Timothy G. Mattson","raw_affiliation_strings":["Intel Corporation, DuPont, WA, USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, DuPont, WA, USA","institution_ids":["https://openalex.org/I1343180700","https://openalex.org/I1316910977"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006952154","display_name":"Michael Riepen","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Michael Riepen","raw_affiliation_strings":["Intel Corporation, China"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5090500207","display_name":"Thomas Lehnig","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Thomas Lehnig","raw_affiliation_strings":["Intel Corporation, China"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5104364430","display_name":"Paul Brett","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Paul Brett","raw_affiliation_strings":["Intel Corporation, China"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109126276","display_name":"Werner Haas","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Werner Haas","raw_affiliation_strings":["Intel Corporation, China"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019266657","display_name":"Patrick Kennedy","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Patrick Kennedy","raw_affiliation_strings":["Intel Corporation, China"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102833447","display_name":"Jason Howard","orcid":"https://orcid.org/0009-0005-6250-6108"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Jason Howard","raw_affiliation_strings":["Intel Corporation, China"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103567305","display_name":"Sriram Vangal","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Sriram Vangal","raw_affiliation_strings":["Intel Corporation, China"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112900267","display_name":"Nitin Borkar","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Nitin Borkar","raw_affiliation_strings":["Intel Corporation, China"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, China","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108382290","display_name":"Greg Ruhl","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Greg Ruhl","raw_affiliation_strings":["Intel Corporation, China"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, China","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5061796240","display_name":"Saurabh Dighe","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Saurabh Dighe","raw_affiliation_strings":["Intel Corporation, China"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, China","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":11,"corresponding_author_ids":["https://openalex.org/A5048097160"],"corresponding_institution_ids":["https://openalex.org/I1316910977","https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":30.2122,"has_fulltext":false,"cited_by_count":229,"citation_normalized_percentile":{"value":0.99816903,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":100},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"11"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/programmer","display_name":"Programmer","score":0.8245956301689148},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8124768733978271},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.5381733775138855},{"id":"https://openalex.org/keywords/shared-memory","display_name":"Shared memory","score":0.5246341824531555},{"id":"https://openalex.org/keywords/core","display_name":"Core (optical fiber)","score":0.48274558782577515},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.48171693086624146},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.4539298117160797},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4447753131389618},{"id":"https://openalex.org/keywords/message-passing","display_name":"Message passing","score":0.41382041573524475},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.37940332293510437},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3223155736923218}],"concepts":[{"id":"https://openalex.org/C2778514511","wikidata":"https://www.wikidata.org/wiki/Q1374194","display_name":"Programmer","level":2,"score":0.8245956301689148},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8124768733978271},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.5381733775138855},{"id":"https://openalex.org/C133875982","wikidata":"https://www.wikidata.org/wiki/Q764810","display_name":"Shared memory","level":2,"score":0.5246341824531555},{"id":"https://openalex.org/C2164484","wikidata":"https://www.wikidata.org/wiki/Q5170150","display_name":"Core (optical fiber)","level":2,"score":0.48274558782577515},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.48171693086624146},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.4539298117160797},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4447753131389618},{"id":"https://openalex.org/C854659","wikidata":"https://www.wikidata.org/wiki/Q1859284","display_name":"Message passing","level":2,"score":0.41382041573524475},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.37940332293510437},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3223155736923218},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/sc.2010.53","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sc.2010.53","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 ACM/IEEE International Conference for High Performance Computing, Networking, Storage and Analysis","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W179815580","https://openalex.org/W1589918049","https://openalex.org/W1597195064","https://openalex.org/W1943625265","https://openalex.org/W1964057018","https://openalex.org/W1974420955","https://openalex.org/W1996887196","https://openalex.org/W2038498586","https://openalex.org/W2041511182","https://openalex.org/W2050090934","https://openalex.org/W2112121929","https://openalex.org/W2134693673","https://openalex.org/W2159747318","https://openalex.org/W6607501997"],"related_works":["https://openalex.org/W4243844743","https://openalex.org/W3208184694","https://openalex.org/W2498758832","https://openalex.org/W4233541614","https://openalex.org/W1578042825","https://openalex.org/W2146401083","https://openalex.org/W3163622116","https://openalex.org/W4287181807","https://openalex.org/W2366325093","https://openalex.org/W2133825528"],"abstract_inverted_index":{"The":[0,67,88],"number":[1],"of":[2,81,102],"cores":[3,38],"integrated":[4],"onto":[5],"a":[6,26],"single":[7],"die":[8],"is":[9,23,48,75],"expected":[10],"to":[11,20,28,35,41,57,62],"climb":[12],"steadily":[13],"in":[14,72],"the":[15,43,99,110,117],"foreseeable":[16],"future.":[17],"This":[18],"move":[19],"many-core":[21,45],"chips":[22],"driven":[24],"by":[25],"need":[27],"optimize":[29],"performance":[30],"per":[31],"watt.":[32],"How":[33],"best":[34],"connect":[36],"these":[37],"and":[39,84],"how":[40],"program":[42],"resulting":[44],"processor,":[46],"however,":[47],"an":[49,76],"open":[50],"research":[51],"question.":[52],"Designs":[53],"vary":[54],"from":[55],"GPUs":[56],"cache-coherent":[58],"shared":[59,85],"memory":[60,65,86],"multiprocessors":[61],"pure":[63],"distributed":[64],"chips.":[66],"48-core":[68],"SCC":[69,118],"processor":[70],"reported":[71],"this":[73,95,103],"paper":[74],"intermediate":[77],"case,":[78],"sharing":[79],"traits":[80],"message":[82,112],"passing":[83,113],"architectures.":[87],"hardware":[89],"has":[90],"been":[91],"described":[92],"elsewhere.":[93],"In":[94,105],"paper,":[96],"we":[97,107],"describe":[98,108],"programmer's":[100],"view":[101],"chip.":[104],"particular":[106],"RCCE:":[109],"native":[111],"model":[114],"created":[115],"for":[116],"processor.":[119]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":5},{"year":2018,"cited_by_count":5},{"year":2017,"cited_by_count":14},{"year":2016,"cited_by_count":22},{"year":2015,"cited_by_count":21},{"year":2014,"cited_by_count":30},{"year":2013,"cited_by_count":43},{"year":2012,"cited_by_count":48}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
