{"id":"https://openalex.org/W3113219708","doi":"https://doi.org/10.1109/sbesc51047.2020.9277841","title":"A Comprehensive Performance Evaluation to GPGPU Applications under STT- RAM based Hybrid Cache Architectures","display_name":"A Comprehensive Performance Evaluation to GPGPU Applications under STT- RAM based Hybrid Cache Architectures","publication_year":2020,"publication_date":"2020-11-24","ids":{"openalex":"https://openalex.org/W3113219708","doi":"https://doi.org/10.1109/sbesc51047.2020.9277841","mag":"3113219708"},"language":"en","primary_location":{"id":"doi:10.1109/sbesc51047.2020.9277841","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sbesc51047.2020.9277841","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 X Brazilian Symposium on Computing Systems Engineering (SBESC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5056993151","display_name":"Jingjing Fu","orcid":"https://orcid.org/0000-0001-5500-6969"},"institutions":[{"id":"https://openalex.org/I16944753","display_name":"Clarkson University","ror":"https://ror.org/03rwgpn18","country_code":"US","type":"education","lineage":["https://openalex.org/I16944753"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jingjing Fu","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Clarkson University, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Clarkson University, NY, USA","institution_ids":["https://openalex.org/I16944753"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100345848","display_name":"Yu Liu","orcid":"https://orcid.org/0000-0002-8044-8862"},"institutions":[{"id":"https://openalex.org/I16944753","display_name":"Clarkson University","ror":"https://ror.org/03rwgpn18","country_code":"US","type":"education","lineage":["https://openalex.org/I16944753"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yu Liu","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Clarkson University, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Clarkson University, NY, USA","institution_ids":["https://openalex.org/I16944753"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I16944753"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"31","issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8406579494476318},{"id":"https://openalex.org/keywords/general-purpose-computing-on-graphics-processing-units","display_name":"General-purpose computing on graphics processing units","score":0.653629720211029},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.6033780574798584},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.518381655216217},{"id":"https://openalex.org/keywords/energy-consumption","display_name":"Energy consumption","score":0.49772074818611145},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.46377840638160706},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.46234551072120667},{"id":"https://openalex.org/keywords/soft-error","display_name":"Soft error","score":0.42305365204811096},{"id":"https://openalex.org/keywords/memory-hierarchy","display_name":"Memory hierarchy","score":0.41252368688583374},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.351912260055542},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.21045824885368347},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.17845645546913147},{"id":"https://openalex.org/keywords/graphics","display_name":"Graphics","score":0.12367391586303711},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.0778515636920929}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8406579494476318},{"id":"https://openalex.org/C50630238","wikidata":"https://www.wikidata.org/wiki/Q971505","display_name":"General-purpose computing on graphics processing units","level":3,"score":0.653629720211029},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.6033780574798584},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.518381655216217},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.49772074818611145},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.46377840638160706},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.46234551072120667},{"id":"https://openalex.org/C154474529","wikidata":"https://www.wikidata.org/wiki/Q1658917","display_name":"Soft error","level":2,"score":0.42305365204811096},{"id":"https://openalex.org/C2778100165","wikidata":"https://www.wikidata.org/wiki/Q1589327","display_name":"Memory hierarchy","level":3,"score":0.41252368688583374},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.351912260055542},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.21045824885368347},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.17845645546913147},{"id":"https://openalex.org/C21442007","wikidata":"https://www.wikidata.org/wiki/Q1027879","display_name":"Graphics","level":2,"score":0.12367391586303711},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0778515636920929},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/sbesc51047.2020.9277841","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sbesc51047.2020.9277841","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 X Brazilian Symposium on Computing Systems Engineering (SBESC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.9100000262260437}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":23,"referenced_works":["https://openalex.org/W1982398126","https://openalex.org/W1994547903","https://openalex.org/W2010202670","https://openalex.org/W2019427687","https://openalex.org/W2027716782","https://openalex.org/W2045257463","https://openalex.org/W2080592089","https://openalex.org/W2141008485","https://openalex.org/W2157587823","https://openalex.org/W2170310381","https://openalex.org/W2318507312","https://openalex.org/W2461445282","https://openalex.org/W2507718047","https://openalex.org/W2548265654","https://openalex.org/W2559766716","https://openalex.org/W2563305490","https://openalex.org/W2598971733","https://openalex.org/W4241441655","https://openalex.org/W4243058626","https://openalex.org/W6652940909","https://openalex.org/W6655548987","https://openalex.org/W6685251632","https://openalex.org/W6699296365"],"related_works":["https://openalex.org/W4290647047","https://openalex.org/W1500230652","https://openalex.org/W2363504003","https://openalex.org/W2066033226","https://openalex.org/W2548582980","https://openalex.org/W2620706469","https://openalex.org/W2052914698","https://openalex.org/W2088929465","https://openalex.org/W2612883256","https://openalex.org/W4386933833"],"abstract_inverted_index":{"Nowadays,":[0],"general":[1],"purpose":[2],"Graphic":[3],"Processing":[4],"Units":[5],"(GPGPUs)":[6],"have":[7],"become":[8],"the":[9,19,33,37,48,98,135,138,142,177,181,189,228],"technical":[10],"trend":[11],"for":[12,159,188],"complex":[13],"science":[14],"and":[15,77,103,109,155,167,208,219],"engineering":[16],"computing":[17,30,50],"in":[18,112,213],"exascale,":[20],"which":[21,183],"is":[22,80,124],"through":[23,71],"its":[24,65,89],"unique":[25,66],"capability":[26],"of":[27,40,68,101,114,133,141,170,180,205,227],"massive":[28],"parallel":[29],"based":[31,162],"on":[32,47,106,163],"many-core":[34],"architecture.":[35],"Also,":[36],"occurrence":[38],"probability":[39],"soft":[41,83,92,190,229],"errors":[42],"caused":[43],"by":[44,53],"particle":[45],"strike":[46],"large-scale":[49],"system":[51,120],"built":[52],"GPGPUs":[54],"has":[55],"been":[56],"boosted":[57],"significantly.":[58],"Spin-Transfer":[59],"Torque":[60],"RAM":[61,117],"(STT-RAM)":[62],"benefits":[63],"from":[64,97],"way":[67],"carrying":[69],"information":[70],"a":[72,81,129,153,202],"Magnetic":[73],"Tunnel":[74],"Junction":[75],"(MTJ),":[76],"then":[78],"it":[79,123],"feasible":[82],"error":[84,191,230],"resilient":[85,192],"solution":[86],"due":[87],"to":[88,91,127],"immunity":[90],"errors.":[93],"However,":[94],"STT-RAM":[95,136,175],"suffers":[96],"large":[99],"overhead":[100],"latency":[102],"energy":[104,221],"consumption":[105,222],"write":[107],"operations,":[108],"thus":[110],"results":[111],"hesitating":[113],"adopting":[115,134,174],"STT-":[116],"into":[118,137,176],"memory":[119,139,178],"design.":[121,195],"Therefore,":[122],"very":[125],"necessary":[126],"do":[128],"comprehensive":[130,156],"performance":[131,157,217],"evaluation":[132,158],"hierarchy":[140,179],"GPGPU":[143,160,193],"architecture":[144,194],"(i.e.,":[145],"hybrid":[146],"STT-RAM/SRAM":[147],"cache":[148,165,206],"architectures).":[149],"This":[150],"work":[151,199],"offers":[152],"fair":[154],"applications":[161],"different":[164],"associativities":[166],"multiple":[168],"plans":[169],"partial":[171],"or":[172],"complete":[173],"GPGPU,":[182],"could":[184],"offer":[185],"useful":[186],"options":[187],"In":[196],"addition,":[197],"this":[198],"encloses":[200],"that":[201],"proper":[203],"combination":[204],"configuration":[207],"adoption":[209],"plan":[210],"may":[211],"result":[212],"only":[214],"slight":[215],"timing":[216],"drop":[218],"equivalent":[220],"performance,":[223],"while":[224],"taking":[225],"advantage":[226],"resilience.":[231]},"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}