{"id":"https://openalex.org/W4415744269","doi":"https://doi.org/10.1109/sbcci66862.2025.11218642","title":"Physical Implementation of the NoX RISC-V Core Using an Open PDK","display_name":"Physical Implementation of the NoX RISC-V Core Using an Open PDK","publication_year":2025,"publication_date":"2025-08-25","ids":{"openalex":"https://openalex.org/W4415744269","doi":"https://doi.org/10.1109/sbcci66862.2025.11218642"},"language":null,"primary_location":{"id":"doi:10.1109/sbcci66862.2025.11218642","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sbcci66862.2025.11218642","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 38th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design (SBCCI)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Augusto Kessler Pires","orcid":null},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Augusto Kessler Pires","raw_affiliation_strings":["Federal University of Rio Grande do Sul (UFRGS) - Institute of Informatics - PPGC - PGMICRO,Porto Alegre,Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Federal University of Rio Grande do Sul (UFRGS) - Institute of Informatics - PPGC - PGMICRO,Porto Alegre,Brazil","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108184021","display_name":"Nathan Guimar\u00e3es","orcid":null},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Nathan Guimar\u00e3es","raw_affiliation_strings":["Federal University of Rio Grande do Sul (UFRGS) - Institute of Informatics - PPGC - PGMICRO,Porto Alegre,Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Federal University of Rio Grande do Sul (UFRGS) - Institute of Informatics - PPGC - PGMICRO,Porto Alegre,Brazil","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5120207040","display_name":"Fernanda Kastensmitd","orcid":null},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Fernanda Kastensmitd","raw_affiliation_strings":["Federal University of Rio Grande do Sul (UFRGS) - Institute of Informatics - PPGC - PGMICRO,Porto Alegre,Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Federal University of Rio Grande do Sul (UFRGS) - Institute of Informatics - PPGC - PGMICRO,Porto Alegre,Brazil","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078952423","display_name":"Antonio Carlos Schneider Beck","orcid":"https://orcid.org/0000-0002-4492-1747"},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Antonio Carlos S. Beck","raw_affiliation_strings":["Federal University of Rio Grande do Sul (UFRGS) - Institute of Informatics - PPGC - PGMICRO,Porto Alegre,Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Federal University of Rio Grande do Sul (UFRGS) - Institute of Informatics - PPGC - PGMICRO,Porto Alegre,Brazil","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016210524","display_name":"Mateus Grellert","orcid":"https://orcid.org/0000-0003-0600-7054"},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Mateus Grellert","raw_affiliation_strings":["Federal University of Rio Grande do Sul (UFRGS) - Institute of Informatics - PPGC - PGMICRO,Porto Alegre,Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Federal University of Rio Grande do Sul (UFRGS) - Institute of Informatics - PPGC - PGMICRO,Porto Alegre,Brazil","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5046167370","display_name":"Jos\u00e9 Rodrigo Azambuja","orcid":"https://orcid.org/0000-0002-2627-5075"},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Jos\u00e9 Rodrigo Azambuja","raw_affiliation_strings":["Federal University of Rio Grande do Sul (UFRGS) - Institute of Informatics - PPGC - PGMICRO,Porto Alegre,Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Federal University of Rio Grande do Sul (UFRGS) - Institute of Informatics - PPGC - PGMICRO,Porto Alegre,Brazil","institution_ids":["https://openalex.org/I130442723"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I130442723"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.31955485,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.3840000033378601,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.3840000033378601,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.2867000102996826,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.11029999703168869,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.7069000005722046},{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.6358000040054321},{"id":"https://openalex.org/keywords/nox","display_name":"NOx","score":0.6245999932289124},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5336999893188477},{"id":"https://openalex.org/keywords/core","display_name":"Core (optical fiber)","score":0.492900013923645},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.4300000071525574}],"concepts":[{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.7069000005722046},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.6358000040054321},{"id":"https://openalex.org/C203032635","wikidata":"https://www.wikidata.org/wiki/Q20962970","display_name":"NOx","level":3,"score":0.6245999932289124},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5336999893188477},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4984000027179718},{"id":"https://openalex.org/C2164484","wikidata":"https://www.wikidata.org/wiki/Q5170150","display_name":"Core (optical fiber)","level":2,"score":0.492900013923645},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.477400004863739},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.4300000071525574},{"id":"https://openalex.org/C18762648","wikidata":"https://www.wikidata.org/wiki/Q42213","display_name":"Work (physics)","level":2,"score":0.41130000352859497},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.3725999891757965},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3716999888420105},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.350600004196167},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.3449000120162964},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.32910001277923584},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.32359999418258667},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.32339999079704285},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.30630001425743103},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.3034999966621399}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/sbcci66862.2025.11218642","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sbcci66862.2025.11218642","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 38th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design (SBCCI)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W3046320443","https://openalex.org/W3115167365","https://openalex.org/W4286367833","https://openalex.org/W4306744182","https://openalex.org/W4313334838","https://openalex.org/W4385245104","https://openalex.org/W4393164691","https://openalex.org/W4405845987"],"related_works":[],"abstract_inverted_index":{"This":[0,100],"paper":[1],"presents":[2],"the":[3,8,14,86,103,121],"complete":[4],"ASIC":[5,117],"synthesis":[6,51],"of":[7,72,107],"NoX":[9,26],"RISC-V":[10,98,112],"processor":[11,32],"core":[12,67],"using":[13,108],"open-source":[15,125],"SkyWater":[16],"130":[17],"nm":[18],"PDK":[19],"and":[20,36,56,62,84,105,115],"commercial":[21],"EDA":[22],"tools":[23],"from":[24],"Cadence.":[25],"is":[27],"an":[28],"open-source,":[29],"modular":[30],"RV32I-Zicsr":[31],"tailored":[33],"for":[34,113],"embedded":[35],"low-power":[37],"applications.":[38],"The":[39,65],"implementation":[40,58],"follows":[41],"a":[42,69,76],"classical":[43],"digital":[44],"design":[45],"flow,":[46],"including":[47],"RTL":[48],"simulation,":[49],"logic":[50],"with":[52,59,111],"multi-mode":[53],"multi-corner":[54],"analysis,":[55],"physical":[57],"detailed":[60],"power":[61,89],"timing":[63],"optimization.":[64],"synthesized":[66],"achieved":[68],"compact":[70],"area":[71],"$0.295":[73],"\\mathrm{~mm}^{2}$,":[74],"met":[75],"100":[77],"MHz":[78],"target":[79],"frequency":[80],"under":[81],"worst-case":[82],"conditions,":[83],"demonstrated":[85],"lowest":[87],"dynamic":[88],"usage":[90],"($231.2":[91],"\\mu":[92],"\\mathrm{~W}":[93],"/":[94],"\\mathrm{MHz}$)":[95],"among":[96],"comparable":[97],"implementations.":[99],"work":[101],"validates":[102],"feasibility":[104],"efficiency":[106],"open":[109],"PDKs":[110],"academic":[114],"low-cost":[116],"designs,":[118],"contributing":[119],"to":[120],"ongoing":[122],"transition":[123],"toward":[124],"hardware":[126],"ecosystems.":[127]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-31T00:00:00"}
