{"id":"https://openalex.org/W4415744150","doi":"https://doi.org/10.1109/sbcci66862.2025.11218275","title":"Real-Time UHD 4K Hardware Design for the Gradient-Based Search of the VVC Affine ME","display_name":"Real-Time UHD 4K Hardware Design for the Gradient-Based Search of the VVC Affine ME","publication_year":2025,"publication_date":"2025-08-25","ids":{"openalex":"https://openalex.org/W4415744150","doi":"https://doi.org/10.1109/sbcci66862.2025.11218275"},"language":null,"primary_location":{"id":"doi:10.1109/sbcci66862.2025.11218275","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sbcci66862.2025.11218275","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 38th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design (SBCCI)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5071640701","display_name":"Marcello M. Mu\u00f1oz","orcid":"https://orcid.org/0000-0003-0627-526X"},"institutions":[{"id":"https://openalex.org/I169248161","display_name":"Universidade Federal de Pelotas","ror":"https://ror.org/05msy9z54","country_code":"BR","type":"education","lineage":["https://openalex.org/I169248161"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Marcello M. Mu\u00f1oz","raw_affiliation_strings":["Federal University of Pelotas - UFPel,Graduate Program in Computing - PPGC Video Technology Research Group - ViTech,Pelotas,Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Federal University of Pelotas - UFPel,Graduate Program in Computing - PPGC Video Technology Research Group - ViTech,Pelotas,Brazil","institution_ids":["https://openalex.org/I169248161"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067507416","display_name":"Denis Maass","orcid":"https://orcid.org/0009-0001-5006-426X"},"institutions":[{"id":"https://openalex.org/I169248161","display_name":"Universidade Federal de Pelotas","ror":"https://ror.org/05msy9z54","country_code":"BR","type":"education","lineage":["https://openalex.org/I169248161"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Denis Maass","raw_affiliation_strings":["Federal University of Pelotas - UFPel,Graduate Program in Computing - PPGC Video Technology Research Group - ViTech,Pelotas,Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Federal University of Pelotas - UFPel,Graduate Program in Computing - PPGC Video Technology Research Group - ViTech,Pelotas,Brazil","institution_ids":["https://openalex.org/I169248161"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5069332580","display_name":"Murilo Perleberg","orcid":"https://orcid.org/0000-0002-1398-5342"},"institutions":[{"id":"https://openalex.org/I169248161","display_name":"Universidade Federal de Pelotas","ror":"https://ror.org/05msy9z54","country_code":"BR","type":"education","lineage":["https://openalex.org/I169248161"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Murilo Perleberg","raw_affiliation_strings":["Federal University of Pelotas - UFPel,Graduate Program in Computing - PPGC Video Technology Research Group - ViTech,Pelotas,Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Federal University of Pelotas - UFPel,Graduate Program in Computing - PPGC Video Technology Research Group - ViTech,Pelotas,Brazil","institution_ids":["https://openalex.org/I169248161"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070735330","display_name":"Luciano Agostini","orcid":"https://orcid.org/0000-0002-3421-5830"},"institutions":[{"id":"https://openalex.org/I169248161","display_name":"Universidade Federal de Pelotas","ror":"https://ror.org/05msy9z54","country_code":"BR","type":"education","lineage":["https://openalex.org/I169248161"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Luciano Agostini","raw_affiliation_strings":["Federal University of Pelotas - UFPel,Graduate Program in Computing - PPGC Video Technology Research Group - ViTech,Pelotas,Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Federal University of Pelotas - UFPel,Graduate Program in Computing - PPGC Video Technology Research Group - ViTech,Pelotas,Brazil","institution_ids":["https://openalex.org/I169248161"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5024570296","display_name":"Guilherme Corr\u00eaa","orcid":"https://orcid.org/0000-0002-2739-6194"},"institutions":[{"id":"https://openalex.org/I169248161","display_name":"Universidade Federal de Pelotas","ror":"https://ror.org/05msy9z54","country_code":"BR","type":"education","lineage":["https://openalex.org/I169248161"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Guilherme Corr\u00eaa","raw_affiliation_strings":["Federal University of Pelotas - UFPel,Graduate Program in Computing - PPGC Video Technology Research Group - ViTech,Pelotas,Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Federal University of Pelotas - UFPel,Graduate Program in Computing - PPGC Video Technology Research Group - ViTech,Pelotas,Brazil","institution_ids":["https://openalex.org/I169248161"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5109375106","display_name":"Marcelo Porto","orcid":null},"institutions":[{"id":"https://openalex.org/I169248161","display_name":"Universidade Federal de Pelotas","ror":"https://ror.org/05msy9z54","country_code":"BR","type":"education","lineage":["https://openalex.org/I169248161"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Marcelo Porto","raw_affiliation_strings":["Federal University of Pelotas - UFPel,Graduate Program in Computing - PPGC Video Technology Research Group - ViTech,Pelotas,Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Federal University of Pelotas - UFPel,Graduate Program in Computing - PPGC Video Technology Research Group - ViTech,Pelotas,Brazil","institution_ids":["https://openalex.org/I169248161"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I169248161"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":0.9526000022888184,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":0.9526000022888184,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10901","display_name":"Advanced Data Compression Techniques","score":0.021400000900030136,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.00430000014603138,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.6658999919891357},{"id":"https://openalex.org/keywords/affine-transformation","display_name":"Affine transformation","score":0.5932000279426575},{"id":"https://openalex.org/keywords/coding","display_name":"Coding (social sciences)","score":0.5508000254631042},{"id":"https://openalex.org/keywords/frame-rate","display_name":"Frame rate","score":0.45159998536109924},{"id":"https://openalex.org/keywords/focus","display_name":"Focus (optics)","score":0.42340001463890076},{"id":"https://openalex.org/keywords/motion-estimation","display_name":"Motion estimation","score":0.3977999985218048},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.3312999904155731}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7002000212669373},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.6658999919891357},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.6299999952316284},{"id":"https://openalex.org/C92757383","wikidata":"https://www.wikidata.org/wiki/Q382497","display_name":"Affine transformation","level":2,"score":0.5932000279426575},{"id":"https://openalex.org/C179518139","wikidata":"https://www.wikidata.org/wiki/Q5140297","display_name":"Coding (social sciences)","level":2,"score":0.5508000254631042},{"id":"https://openalex.org/C3261483","wikidata":"https://www.wikidata.org/wiki/Q119565","display_name":"Frame rate","level":2,"score":0.45159998536109924},{"id":"https://openalex.org/C192209626","wikidata":"https://www.wikidata.org/wiki/Q190909","display_name":"Focus (optics)","level":2,"score":0.42340001463890076},{"id":"https://openalex.org/C10161872","wikidata":"https://www.wikidata.org/wiki/Q557891","display_name":"Motion estimation","level":2,"score":0.3977999985218048},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.3312999904155731},{"id":"https://openalex.org/C65483669","wikidata":"https://www.wikidata.org/wiki/Q3536669","display_name":"Video processing","level":2,"score":0.32350000739097595},{"id":"https://openalex.org/C118993495","wikidata":"https://www.wikidata.org/wiki/Q5042828","display_name":"Electrical efficiency","level":3,"score":0.32120001316070557},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.31220000982284546},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.30640000104904175},{"id":"https://openalex.org/C65232700","wikidata":"https://www.wikidata.org/wiki/Q5656403","display_name":"Hardware architecture","level":3,"score":0.2840000092983246},{"id":"https://openalex.org/C125411270","wikidata":"https://www.wikidata.org/wiki/Q18653","display_name":"Encoding (memory)","level":2,"score":0.27489998936653137},{"id":"https://openalex.org/C73431340","wikidata":"https://www.wikidata.org/wiki/Q182656","display_name":"Chipset","level":3,"score":0.27000001072883606},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.2669000029563904},{"id":"https://openalex.org/C116709606","wikidata":"https://www.wikidata.org/wiki/Q1296251","display_name":"Algorithmic efficiency","level":3,"score":0.2581999897956848},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.25040000677108765}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/sbcci66862.2025.11218275","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sbcci66862.2025.11218275","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 38th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design (SBCCI)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1524384108","https://openalex.org/W1980598689","https://openalex.org/W2010472040","https://openalex.org/W2023262818","https://openalex.org/W2146395539","https://openalex.org/W2149397437","https://openalex.org/W2590077255","https://openalex.org/W2897872264","https://openalex.org/W3117589249","https://openalex.org/W3135530072","https://openalex.org/W3153323090","https://openalex.org/W3168354393","https://openalex.org/W3202918664","https://openalex.org/W4404788000","https://openalex.org/W4405218684"],"related_works":[],"abstract_inverted_index":{"The":[0,18],"Affine":[1,101],"Motion":[2],"Estimation":[3],"(AME)":[4],"is":[5],"one":[6],"of":[7,11,40,83,104,120,136,144,151],"the":[8,12,22,38,65,69,100,105,121,149],"new":[9],"tools":[10],"Versatile":[13],"Video":[14],"Coding":[15],"(VVC)":[16],"standard.":[17],"AME":[19],"contribution":[20],"to":[21,50,73],"coding":[23],"efficiency":[24,58],"comes":[25],"with":[26,76,108,140],"a":[27,52,80,95,109,133,141],"high":[28,53,57],"computational":[29],"cost,":[30],"especially":[31],"for":[32,44,99],"real-time":[33,112],"high-resolution":[34],"video":[35,115],"encoding,":[36],"making":[37],"employment":[39],"dedicated":[41,96],"hardware":[42,97],"mandatory":[43],"battery-powered":[45],"devices.":[46],"To":[47],"be":[48],"able":[49],"reach":[51],"processing":[54,150],"rate":[55],"and":[56,62],"in":[59],"area":[60,135],"utilization":[61],"power":[63,142],"dissipation,":[64],"proposed":[66,122],"architecture":[67],"reduced":[68],"gradient-based":[70],"iterative":[71],"algorithm":[72],"three":[74],"iterations,":[75],"this":[77,92],"optimization":[78],"having":[79],"BD-Rate":[81],"increase":[82],"only":[84],"$\\mathbf{0.":[85],"9":[86],"2":[87],"\\%}$.":[88],"Considering":[89],"these":[90],"optimizations,":[91],"work":[93],"presents":[94],"design":[98],"Gradient-Based":[102],"Search":[103],"VVC":[106],"standard,":[107],"focus":[110],"on":[111],"UHD":[113,152],"4K":[114],"processing.":[116],"ASIC":[117],"synthesis":[118],"results":[119],"design,":[123],"synthesized":[124],"using":[125],"TSMC":[126],"40":[127],"nm":[128],"standard":[129],"cells":[130],"technology,":[131],"show":[132],"circuit":[134],"728":[137],"K":[138],"gates,":[139],"dissipation":[143],"54.70":[145],"mW":[146],"when":[147],"targeting":[148],"4K@60fps":[153],"videos.":[154]},"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-31T00:00:00"}