{"id":"https://openalex.org/W4403279693","doi":"https://doi.org/10.1109/sbcci62366.2024.10704002","title":"A 9.78-ENOB 10 MS/s SAR ADC with a Common Mode Compensation Technique in a 28nm CMOS Node","display_name":"A 9.78-ENOB 10 MS/s SAR ADC with a Common Mode Compensation Technique in a 28nm CMOS Node","publication_year":2024,"publication_date":"2024-09-02","ids":{"openalex":"https://openalex.org/W4403279693","doi":"https://doi.org/10.1109/sbcci62366.2024.10704002"},"language":"en","primary_location":{"id":"doi:10.1109/sbcci62366.2024.10704002","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sbcci62366.2024.10704002","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design (SBCCI)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5113426502","display_name":"Jorge Angarita P\u00e9rez","orcid":null},"institutions":[{"id":"https://openalex.org/I115684694","display_name":"Industrial University of Santander","ror":"https://ror.org/00xc1d948","country_code":"CO","type":"education","lineage":["https://openalex.org/I115684694"]}],"countries":["CO"],"is_corresponding":false,"raw_author_name":"Jorge Angarita P\u00e9rez","raw_affiliation_strings":["Universidad Industrial de Santander,Bucaramanga,Colombia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Universidad Industrial de Santander,Bucaramanga,Colombia","institution_ids":["https://openalex.org/I115684694"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113426503","display_name":"Nicolas Orcasitas Garc\u00eda","orcid":null},"institutions":[{"id":"https://openalex.org/I115684694","display_name":"Industrial University of Santander","ror":"https://ror.org/00xc1d948","country_code":"CO","type":"education","lineage":["https://openalex.org/I115684694"]}],"countries":["CO"],"is_corresponding":false,"raw_author_name":"Nicolas Orcasitas Garc\u00eda","raw_affiliation_strings":["Universidad Industrial de Santander,Bucaramanga,Colombia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Universidad Industrial de Santander,Bucaramanga,Colombia","institution_ids":["https://openalex.org/I115684694"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108034265","display_name":"Hugo Hern\u00e1ndez","orcid":"https://orcid.org/0000-0001-9537-1194"},"institutions":[{"id":"https://openalex.org/I4210099336","display_name":"Menlo School","ror":"https://ror.org/01240pn49","country_code":"US","type":"education","lineage":["https://openalex.org/I4210099336"]},{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hugo D. Hern\u00e1ndez","raw_affiliation_strings":["Stanford University,Menlo Park,USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Stanford University,Menlo Park,USA","institution_ids":["https://openalex.org/I4210099336","https://openalex.org/I97018004"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5052022415","display_name":"Javier Ardila","orcid":"https://orcid.org/0000-0001-6331-3133"},"institutions":[{"id":"https://openalex.org/I115684694","display_name":"Industrial University of Santander","ror":"https://ror.org/00xc1d948","country_code":"CO","type":"education","lineage":["https://openalex.org/I115684694"]}],"countries":["CO"],"is_corresponding":false,"raw_author_name":"Javier Ardila","raw_affiliation_strings":["Universidad Industrial de Santander,Bucaramanga,Colombia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Universidad Industrial de Santander,Bucaramanga,Colombia","institution_ids":["https://openalex.org/I115684694"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.9364,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.9172955,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":91,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9948999881744385,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/effective-number-of-bits","display_name":"Effective number of bits","score":0.879568338394165},{"id":"https://openalex.org/keywords/successive-approximation-adc","display_name":"Successive approximation ADC","score":0.7738356590270996},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7444566488265991},{"id":"https://openalex.org/keywords/node","display_name":"Node (physics)","score":0.6621426343917847},{"id":"https://openalex.org/keywords/compensation","display_name":"Compensation (psychology)","score":0.5620661377906799},{"id":"https://openalex.org/keywords/mode","display_name":"Mode (computer interface)","score":0.42838239669799805},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.41975829005241394},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.35806190967559814},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.34372133016586304},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.31527793407440186},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20913320779800415},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.1833447515964508},{"id":"https://openalex.org/keywords/psychology","display_name":"Psychology","score":0.08028209209442139}],"concepts":[{"id":"https://openalex.org/C16671190","wikidata":"https://www.wikidata.org/wiki/Q505579","display_name":"Effective number of bits","level":3,"score":0.879568338394165},{"id":"https://openalex.org/C60154766","wikidata":"https://www.wikidata.org/wiki/Q2650458","display_name":"Successive approximation ADC","level":4,"score":0.7738356590270996},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7444566488265991},{"id":"https://openalex.org/C62611344","wikidata":"https://www.wikidata.org/wiki/Q1062658","display_name":"Node (physics)","level":2,"score":0.6621426343917847},{"id":"https://openalex.org/C2780023022","wikidata":"https://www.wikidata.org/wiki/Q1338171","display_name":"Compensation (psychology)","level":2,"score":0.5620661377906799},{"id":"https://openalex.org/C48677424","wikidata":"https://www.wikidata.org/wiki/Q6888088","display_name":"Mode (computer interface)","level":2,"score":0.42838239669799805},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.41975829005241394},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.35806190967559814},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.34372133016586304},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.31527793407440186},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20913320779800415},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.1833447515964508},{"id":"https://openalex.org/C15744967","wikidata":"https://www.wikidata.org/wiki/Q9418","display_name":"Psychology","level":0,"score":0.08028209209442139},{"id":"https://openalex.org/C11171543","wikidata":"https://www.wikidata.org/wiki/Q41630","display_name":"Psychoanalysis","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C66938386","wikidata":"https://www.wikidata.org/wiki/Q633538","display_name":"Structural engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/sbcci62366.2024.10704002","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sbcci62366.2024.10704002","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design (SBCCI)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320325610","display_name":"Universidad Industrial de Santander","ror":"https://ror.org/00xc1d948"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1679150843","https://openalex.org/W1986304404","https://openalex.org/W2004795782","https://openalex.org/W2037452784","https://openalex.org/W2047193536","https://openalex.org/W2101004723","https://openalex.org/W2132406028","https://openalex.org/W2142753319","https://openalex.org/W2164251692","https://openalex.org/W2336406978","https://openalex.org/W2516744640","https://openalex.org/W2613339586","https://openalex.org/W2965566688","https://openalex.org/W3110546428","https://openalex.org/W3121152720","https://openalex.org/W3175435834","https://openalex.org/W6680735845","https://openalex.org/W6768967636"],"related_works":["https://openalex.org/W2914701507","https://openalex.org/W2905521207","https://openalex.org/W2168717468","https://openalex.org/W2161345192","https://openalex.org/W2783221760","https://openalex.org/W3156142317","https://openalex.org/W4292071990","https://openalex.org/W3216962587","https://openalex.org/W169064491","https://openalex.org/W4224994410"],"abstract_inverted_index":{"A":[0],"10-bit":[1],"differential":[2,88],"synchronous":[3],"SAR":[4],"ADC":[5],"designed":[6],"in":[7,47],"28":[8],"nm":[9],"CMOS":[10],"technology":[11],"is":[12,40,107],"proposed":[13],"for":[14,73],"integration":[15],"into":[16],"a":[17,37,60,78,87],"system-on-chip":[18],"(SoC).":[19],"The":[20,102],"implemented":[21],"DAC":[22],"employs":[23],"monotonic":[24],"switching":[25],"to":[26,42,50],"reduce":[27],"settling":[28],"time":[29],"and":[30,94],"power":[31,79],"consumption":[32,80],"by":[33],"minimizing":[34],"capacitance.":[35],"Additionally,":[36],"novel":[38],"technique":[39],"introduced":[41],"eliminate":[43],"common-mode":[44],"voltage":[45],"drop":[46],"capacitors":[48],"corresponding":[49],"the":[51],"3":[52],"most":[53],"significant":[54],"bits.":[55],"Simulated":[56],"post-layout":[57],"testing":[58],"demonstrates":[59],"typical":[61],"effective":[62],"number":[63],"of":[64,67,81,91,99,104],"bits":[65],"(ENOB)":[66],"9.78":[68],"at":[69],"maximum":[70],"sampling":[71],"frequency":[72,75],"Nyquist":[74],"input,":[76],"with":[77],"489.7":[82],"\u00b5W.":[83],"Static":[84],"tests":[85],"reveal":[86],"non-linearity":[89,97],"(DNL)":[90],"+0.16/-0.23":[92],"LSB":[93],"an":[95],"integral":[96],"(INL)":[98],"\u00b10.4":[100],"LSB.":[101],"figure":[103],"merit":[105],"(FoM)":[106],"calculated":[108],"as":[109],"55.82":[110],"fJ/Conv.":[111]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":1}],"updated_date":"2026-08-28T12:50:07.497085","created_date":"2025-10-10T00:00:00"}