{"id":"https://openalex.org/W4403279177","doi":"https://doi.org/10.1109/sbcci62366.2024.10703982","title":"AxMOD: VLSI Modular Reduction Design Exploring Approximate Arithmetic Units","display_name":"AxMOD: VLSI Modular Reduction Design Exploring Approximate Arithmetic Units","publication_year":2024,"publication_date":"2024-09-02","ids":{"openalex":"https://openalex.org/W4403279177","doi":"https://doi.org/10.1109/sbcci62366.2024.10703982"},"language":"en","primary_location":{"id":"doi:10.1109/sbcci62366.2024.10703982","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sbcci62366.2024.10703982","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design (SBCCI)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5108184384","display_name":"Louren\u00e7o Mulling","orcid":null},"institutions":[{"id":"https://openalex.org/I169248161","display_name":"Universidade Federal de Pelotas","ror":"https://ror.org/05msy9z54","country_code":"BR","type":"education","lineage":["https://openalex.org/I169248161"]}],"countries":["BR"],"is_corresponding":true,"raw_author_name":"Louren\u00e7o Mulling","raw_affiliation_strings":["Federal University of Pelotas (UFPel),Graduate Program on Computing,Pelotas,Brazil"],"affiliations":[{"raw_affiliation_string":"Federal University of Pelotas (UFPel),Graduate Program on Computing,Pelotas,Brazil","institution_ids":["https://openalex.org/I169248161"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5041755258","display_name":"Morgana Macedo Azevedo da Rosa","orcid":"https://orcid.org/0000-0001-9582-9011"},"institutions":[{"id":"https://openalex.org/I169248161","display_name":"Universidade Federal de Pelotas","ror":"https://ror.org/05msy9z54","country_code":"BR","type":"education","lineage":["https://openalex.org/I169248161"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Morgana M. A. Rosa","raw_affiliation_strings":["Federal University of Pelotas (UFPel),Graduate Program on Computing,Pelotas,Brazil"],"affiliations":[{"raw_affiliation_string":"Federal University of Pelotas (UFPel),Graduate Program on Computing,Pelotas,Brazil","institution_ids":["https://openalex.org/I169248161"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030974893","display_name":"Rafael Soares","orcid":"https://orcid.org/0000-0001-9493-7272"},"institutions":[{"id":"https://openalex.org/I169248161","display_name":"Universidade Federal de Pelotas","ror":"https://ror.org/05msy9z54","country_code":"BR","type":"education","lineage":["https://openalex.org/I169248161"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Rafael Soares","raw_affiliation_strings":["Federal University of Pelotas (UFPel),Graduate Program on Computing,Pelotas,Brazil"],"affiliations":[{"raw_affiliation_string":"Federal University of Pelotas (UFPel),Graduate Program on Computing,Pelotas,Brazil","institution_ids":["https://openalex.org/I169248161"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5074598853","display_name":"Eduardo Costa","orcid":"https://orcid.org/0009-0009-2731-8864"},"institutions":[{"id":"https://openalex.org/I110676245","display_name":"Universidade Cat\u00f3lica de Pelotas","ror":"https://ror.org/0376myh60","country_code":"BR","type":"education","lineage":["https://openalex.org/I110676245"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Eduardo Costa","raw_affiliation_strings":["Catholic University of Pelotas (UCPel),Graduate Program on Electronic Engineering and Computing,Pelotas,Brazil"],"affiliations":[{"raw_affiliation_string":"Catholic University of Pelotas (UCPel),Graduate Program on Electronic Engineering and Computing,Pelotas,Brazil","institution_ids":["https://openalex.org/I110676245"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5108184384"],"corresponding_institution_ids":["https://openalex.org/I169248161"],"apc_list":null,"apc_paid":null,"fwci":0.2166,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.53573522,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":97,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9947999715805054,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.8065413236618042},{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.7459505200386047},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.7228301167488098},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.6804200410842896},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6139829158782959},{"id":"https://openalex.org/keywords/modular-arithmetic","display_name":"Modular arithmetic","score":0.4803663194179535},{"id":"https://openalex.org/keywords/saturation-arithmetic","display_name":"Saturation arithmetic","score":0.46765702962875366},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4534473717212677},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4048900008201599},{"id":"https://openalex.org/keywords/arbitrary-precision-arithmetic","display_name":"Arbitrary-precision arithmetic","score":0.3197419047355652},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.24119272828102112},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.22506281733512878},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.12379923462867737}],"concepts":[{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.8065413236618042},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.7459505200386047},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.7228301167488098},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.6804200410842896},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6139829158782959},{"id":"https://openalex.org/C32049820","wikidata":"https://www.wikidata.org/wiki/Q319400","display_name":"Modular arithmetic","level":3,"score":0.4803663194179535},{"id":"https://openalex.org/C182775192","wikidata":"https://www.wikidata.org/wiki/Q913725","display_name":"Saturation arithmetic","level":3,"score":0.46765702962875366},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4534473717212677},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4048900008201599},{"id":"https://openalex.org/C83581934","wikidata":"https://www.wikidata.org/wiki/Q527381","display_name":"Arbitrary-precision arithmetic","level":2,"score":0.3197419047355652},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.24119272828102112},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.22506281733512878},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.12379923462867737},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/sbcci62366.2024.10703982","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sbcci62366.2024.10703982","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design (SBCCI)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Climate action","score":0.4099999964237213,"id":"https://metadata.un.org/sdg/13"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320321091","display_name":"Coordena\u00e7\u00e3o de Aperfei\u00e7oamento de Pessoal de N\u00edvel Superior","ror":"https://ror.org/00x0ma614"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":30,"referenced_works":["https://openalex.org/W159145550","https://openalex.org/W2005865544","https://openalex.org/W2016990310","https://openalex.org/W2034332552","https://openalex.org/W2059714621","https://openalex.org/W2111683822","https://openalex.org/W2126044301","https://openalex.org/W2135089667","https://openalex.org/W2168891461","https://openalex.org/W2311502962","https://openalex.org/W2497368240","https://openalex.org/W2884983013","https://openalex.org/W2887669960","https://openalex.org/W2912921810","https://openalex.org/W2974631857","https://openalex.org/W2979925167","https://openalex.org/W3009004642","https://openalex.org/W3016480177","https://openalex.org/W3021587158","https://openalex.org/W3026977650","https://openalex.org/W3091012253","https://openalex.org/W3096150904","https://openalex.org/W3166046556","https://openalex.org/W3196589408","https://openalex.org/W4249697915","https://openalex.org/W4288391459","https://openalex.org/W4313250823","https://openalex.org/W4366966825","https://openalex.org/W4388853572","https://openalex.org/W6746320588"],"related_works":["https://openalex.org/W2074843875","https://openalex.org/W2131286165","https://openalex.org/W2426876014","https://openalex.org/W4294326371","https://openalex.org/W2334917338","https://openalex.org/W2400405359","https://openalex.org/W2061436543","https://openalex.org/W2949327565","https://openalex.org/W2164110602","https://openalex.org/W50302539"],"abstract_inverted_index":{"This":[0],"work":[1],"investigates":[2],"the":[3,12,24,82,98,102,135],"design":[4],"of":[5,64,90,129],"approximate":[6,30,39,54,62,65,76,86,94],"arithmetic":[7,26,95],"operator":[8],"units":[9,68],"used":[10],"in":[11,111],"VLSI":[13],"modular":[14],"reduction":[15],"(AxMOD)":[16],"architecture.":[17],"The":[18],"AxMOD":[19],"architecture":[20],"herein":[21],"proposed":[22],"explores":[23],"following":[25],"operators:":[27],"i)":[28],"two":[29],"iterative-based":[31],"fixed-point":[32,112],"and":[33,53,59,81,104,119],"Goldschmidt":[34],"(GLD)":[35],"dividers,":[36],"ii)":[37],"five":[38,61],"adders":[40],"(AxA):":[41],"COPY":[42],"adder,":[43],"error-tolerant":[44],"adder":[45,49,57,121],"(ETA),":[46],"lower-part":[47],"OR":[48],"(LOA),":[50],"truncation":[51],"(Trunc),":[52,80],"parallel":[55],"prefix":[56],"(AxPPA),":[58],"iii)":[60],"multipliers":[63],"radix-4":[66],"multiplier":[67,73,79],"(AxRMU),":[69],"dynamic":[70],"range":[71],"unbiased":[72],"(DRUM),":[74],"rounding-based":[75],"(RoBA),":[77],"truncated":[78],"leading":[83],"one-bit":[84],"based":[85],"(LoBA).":[87],"Our":[88,107],"demonstration":[89],"AxMOD\u2019s":[91],"efficiency":[92],"using":[93],"operators":[96],"from":[97],"Pareto-optimal":[99],"front":[100],"illustrates":[101],"area":[103],"power-quality":[105],"trade-off.":[106],"results":[108],"reveal":[109],"that":[110],"arithmetic,":[113],"AxRMU":[114],"with":[115,122],"K":[116,123],"=":[117,124],"16":[118],"Trunc":[120],"8":[125],"deliver":[126],"energy":[127],"savings":[128],"up":[130],"to":[131,134],"4.14\u00d7":[132],"compared":[133],"state-of-the-art.":[136]},"counts_by_year":[{"year":2026,"cited_by_count":1}],"updated_date":"2026-03-14T08:43:22.919905","created_date":"2025-10-10T00:00:00"}