{"id":"https://openalex.org/W2901675922","doi":"https://doi.org/10.1109/sbcci.2018.8533225","title":"Low Power Bulk-Driven OTA Design Optimization Using Cuckoo Search Algorithm","display_name":"Low Power Bulk-Driven OTA Design Optimization Using Cuckoo Search Algorithm","publication_year":2018,"publication_date":"2018-08-01","ids":{"openalex":"https://openalex.org/W2901675922","doi":"https://doi.org/10.1109/sbcci.2018.8533225","mag":"2901675922"},"language":"en","primary_location":{"id":"doi:10.1109/sbcci.2018.8533225","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sbcci.2018.8533225","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 31st Symposium on Integrated Circuits and Systems Design (SBCCI)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5013003051","display_name":"Anderson Fortes","orcid":"https://orcid.org/0000-0003-1865-3248"},"institutions":[{"id":"https://openalex.org/I72872986","display_name":"Universidade Federal do Pampa","ror":"https://ror.org/003qt4p19","country_code":"BR","type":"education","lineage":["https://openalex.org/I72872986"]}],"countries":["BR"],"is_corresponding":true,"raw_author_name":"Anderson Fortes","raw_affiliation_strings":["Federal University of Pampa - UNIPAMPA, Alegrete, RS, Brazil"],"affiliations":[{"raw_affiliation_string":"Federal University of Pampa - UNIPAMPA, Alegrete, RS, Brazil","institution_ids":["https://openalex.org/I72872986"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020089586","display_name":"Luiz Augusto da Silva","orcid":"https://orcid.org/0000-0001-6861-6651"},"institutions":[{"id":"https://openalex.org/I72872986","display_name":"Universidade Federal do Pampa","ror":"https://ror.org/003qt4p19","country_code":"BR","type":"education","lineage":["https://openalex.org/I72872986"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Luiz A. da Silva","raw_affiliation_strings":["Federal University of Pampa - UNIPAMPA, Alegrete, RS, Brazil"],"affiliations":[{"raw_affiliation_string":"Federal University of Pampa - UNIPAMPA, Alegrete, RS, Brazil","institution_ids":["https://openalex.org/I72872986"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5090138108","display_name":"Alessandro Girardi","orcid":"https://orcid.org/0000-0002-0074-7855"},"institutions":[{"id":"https://openalex.org/I72872986","display_name":"Universidade Federal do Pampa","ror":"https://ror.org/003qt4p19","country_code":"BR","type":"education","lineage":["https://openalex.org/I72872986"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Alessandro Girardi","raw_affiliation_strings":["Federal University of Pampa - UNIPAMPA, Alegrete, RS, Brazil"],"affiliations":[{"raw_affiliation_string":"Federal University of Pampa - UNIPAMPA, Alegrete, RS, Brazil","institution_ids":["https://openalex.org/I72872986"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5013003051"],"corresponding_institution_ids":["https://openalex.org/I72872986"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.12440963,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"55","issue":null,"first_page":"1","last_page":"7"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7142770290374756},{"id":"https://openalex.org/keywords/cuckoo-search","display_name":"Cuckoo search","score":0.6622028350830078},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.6201216578483582},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6125099658966064},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5405138731002808},{"id":"https://openalex.org/keywords/sizing","display_name":"Sizing","score":0.5315142869949341},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.5249452590942383},{"id":"https://openalex.org/keywords/electronic-design-automation","display_name":"Electronic design automation","score":0.5120099186897278},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.4968009293079376},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.4586787819862366},{"id":"https://openalex.org/keywords/power\u2013delay-product","display_name":"Power\u2013delay product","score":0.42870795726776123},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.41369760036468506},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2720036208629608},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.2517987787723541},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.24756333231925964},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2247193455696106},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.1671857237815857},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.11340999603271484},{"id":"https://openalex.org/keywords/particle-swarm-optimization","display_name":"Particle swarm optimization","score":0.11317163705825806}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7142770290374756},{"id":"https://openalex.org/C117241572","wikidata":"https://www.wikidata.org/wiki/Q5192379","display_name":"Cuckoo search","level":3,"score":0.6622028350830078},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6201216578483582},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6125099658966064},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5405138731002808},{"id":"https://openalex.org/C2777767291","wikidata":"https://www.wikidata.org/wiki/Q1080291","display_name":"Sizing","level":2,"score":0.5315142869949341},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.5249452590942383},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.5120099186897278},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.4968009293079376},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.4586787819862366},{"id":"https://openalex.org/C2776391166","wikidata":"https://www.wikidata.org/wiki/Q7236873","display_name":"Power\u2013delay product","level":4,"score":0.42870795726776123},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.41369760036468506},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2720036208629608},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.2517987787723541},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.24756333231925964},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2247193455696106},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.1671857237815857},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.11340999603271484},{"id":"https://openalex.org/C85617194","wikidata":"https://www.wikidata.org/wiki/Q2072794","display_name":"Particle swarm optimization","level":2,"score":0.11317163705825806},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/sbcci.2018.8533225","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sbcci.2018.8533225","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 31st Symposium on Integrated Circuits and Systems Design (SBCCI)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8799999952316284}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W186730292","https://openalex.org/W1585662735","https://openalex.org/W1976744965","https://openalex.org/W2035061364","https://openalex.org/W2067097483","https://openalex.org/W2093276802","https://openalex.org/W2095157116","https://openalex.org/W2160401101","https://openalex.org/W2169924428","https://openalex.org/W2170444246","https://openalex.org/W2172236250","https://openalex.org/W2274118434","https://openalex.org/W2368587440","https://openalex.org/W2542282309","https://openalex.org/W2603246660","https://openalex.org/W2748139186","https://openalex.org/W6728704183","https://openalex.org/W6743164832","https://openalex.org/W7043358764"],"related_works":["https://openalex.org/W3042858012","https://openalex.org/W2129188682","https://openalex.org/W2031109708","https://openalex.org/W3205162826","https://openalex.org/W2059530328","https://openalex.org/W2996372837","https://openalex.org/W3173352547","https://openalex.org/W2080428035","https://openalex.org/W1975701649","https://openalex.org/W2743305891"],"abstract_inverted_index":{"The":[0,21,101],"design":[1,61,92,139],"of":[2,10,18,118,125],"CMOS":[3,73],"analog":[4,143],"integrated":[5],"circuits":[6,150],"presents":[7,58],"low":[8,25],"level":[9],"automation":[11],"and":[12,44,97,121],"still":[13],"depends":[14],"on":[15],"the":[16,19,37,82,91,138,155],"experience":[17],"designer.":[20],"sizing":[22],"procedure":[23],"for":[24,63,152],"power":[26,116],"applications":[27],"is":[28,42,86],"extremely":[29],"challenging,":[30],"since":[31],"transistors":[32,153],"must":[33],"be":[34],"biased":[35],"in":[36,51,70,81,94,130,137,148,154],"sub-threshold":[38,156],"region,":[39],"whose":[40],"modeling":[41],"complex":[43],"few":[45],"intuitive":[46],"if":[47,108],"second":[48],"order":[49],"effects":[50],"sub-micron":[52],"technologies":[53],"are":[54],"considered.":[55],"This":[56],"paper":[57],"an":[59,134,142],"automatic":[60],"methodology":[62],"a":[64,111,115,122],"0.25":[65],"V":[66],"bulk-driven":[67],"Miller":[68],"OTA":[69],"130":[71],"nm":[72],"using":[74],"bioinspired":[75],"Cuckoo":[76],"Search":[77],"optimization":[78],"technique":[79],"implemented":[80],"UCAF":[83],"tool,":[84],"which":[85],"able":[87],"to":[88,110],"explore":[89],"efficiently":[90],"space":[93,140],"strong,":[95],"moderate":[96],"weak":[98],"inversion":[99],"regions.":[100],"resulting":[102],"sized":[103],"circuit":[104],"presented":[105],"better":[106],"performance":[107],"compared":[109],"manual":[112],"design,":[113],"achieving":[114],"consumption":[117],"10":[119],"nW":[120],"gain-bandwidth":[123],"product":[124],"7.5":[126],"kHz.":[127],"We":[128],"demonstrate":[129],"this":[131],"work":[132],"that":[133],"efficient":[135],"search":[136],"with":[141],"CAD":[144],"tool":[145],"can":[146],"result":[147],"optimized":[149],"even":[151],"operation":[157],"region.":[158]},"counts_by_year":[{"year":2023,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}