{"id":"https://openalex.org/W1964582038","doi":"https://doi.org/10.1109/sbcci.2013.6644870","title":"A new code compression algorithm and its decompressor in FPGA-based hardware","display_name":"A new code compression algorithm and its decompressor in FPGA-based hardware","publication_year":2013,"publication_date":"2013-09-01","ids":{"openalex":"https://openalex.org/W1964582038","doi":"https://doi.org/10.1109/sbcci.2013.6644870","mag":"1964582038"},"language":"en","primary_location":{"id":"doi:10.1109/sbcci.2013.6644870","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sbcci.2013.6644870","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5069308291","display_name":"Wanderson Roger Azevedo D\u00edas","orcid":"https://orcid.org/0000-0002-9400-9510"},"institutions":[{"id":"https://openalex.org/I62885914","display_name":"Universidade Federal do Amazonas","ror":"https://ror.org/02263ky35","country_code":"BR","type":"education","lineage":["https://openalex.org/I62885914"]}],"countries":["BR"],"is_corresponding":true,"raw_author_name":"Wanderson Roger Azevedo Dias","raw_affiliation_strings":["Institute of Computing, Federal University of Amazonas, Manaus, Amazonas, Brazil","Inst. of Comput. - Icomp, Fed. Univ. of Amazonas - UFAM, Manaus, Brazil"],"affiliations":[{"raw_affiliation_string":"Institute of Computing, Federal University of Amazonas, Manaus, Amazonas, Brazil","institution_ids":["https://openalex.org/I62885914"]},{"raw_affiliation_string":"Inst. of Comput. - Icomp, Fed. Univ. of Amazonas - UFAM, Manaus, Brazil","institution_ids":["https://openalex.org/I62885914"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035671529","display_name":"Edward David Moreno","orcid":"https://orcid.org/0000-0002-4786-9243"},"institutions":[{"id":"https://openalex.org/I190085865","display_name":"Universidade Federal de Sergipe","ror":"https://ror.org/028ka0n85","country_code":"BR","type":"education","lineage":["https://openalex.org/I190085865"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Edward David Moreno","raw_affiliation_strings":["Department of Computer Science, Federal University of Sergipe, Aracaju, Sergipe, Brazil","Dept. of Comput. Sci. - DComp, Fed. Univ. of Sergipe - UFS, Aracaju, Brazil"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Federal University of Sergipe, Aracaju, Sergipe, Brazil","institution_ids":["https://openalex.org/I190085865"]},{"raw_affiliation_string":"Dept. of Comput. Sci. - DComp, Fed. Univ. of Sergipe - UFS, Aracaju, Brazil","institution_ids":["https://openalex.org/I190085865"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5083118638","display_name":"Isaac Nattan Palmeira","orcid":null},"institutions":[{"id":"https://openalex.org/I190085865","display_name":"Universidade Federal de Sergipe","ror":"https://ror.org/028ka0n85","country_code":"BR","type":"education","lineage":["https://openalex.org/I190085865"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Isaac Nattan Palmeira","raw_affiliation_strings":["Department of Computer Science, Federal University of Sergipe, Aracaju, Sergipe, Brazil","Dept. of Comput. Sci. - DComp, Fed. Univ. of Sergipe - UFS, Aracaju, Brazil"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Federal University of Sergipe, Aracaju, Sergipe, Brazil","institution_ids":["https://openalex.org/I190085865"]},{"raw_affiliation_string":"Dept. of Comput. Sci. - DComp, Fed. Univ. of Sergipe - UFS, Aracaju, Brazil","institution_ids":["https://openalex.org/I190085865"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5069308291"],"corresponding_institution_ids":["https://openalex.org/I62885914"],"apc_list":null,"apc_paid":null,"fwci":1.4428,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.84834038,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"25","issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11269","display_name":"Algorithms and Data Compression","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11269","display_name":"Algorithms and Data Compression","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9941999912261963,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10901","display_name":"Advanced Data Compression Techniques","score":0.9940999746322632,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/huffman-coding","display_name":"Huffman coding","score":0.8774669170379639},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8137620091438293},{"id":"https://openalex.org/keywords/canonical-huffman-code","display_name":"Canonical Huffman code","score":0.7014347314834595},{"id":"https://openalex.org/keywords/powerpc","display_name":"PowerPC","score":0.6699120998382568},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.5752905011177063},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5540689826011658},{"id":"https://openalex.org/keywords/data-compression","display_name":"Data compression","score":0.5432960987091064},{"id":"https://openalex.org/keywords/code","display_name":"Code (set theory)","score":0.5065065622329712},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4526916444301605},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4237307012081146},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3901136517524719},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3870643377304077},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.21266862750053406},{"id":"https://openalex.org/keywords/systematic-code","display_name":"Systematic code","score":0.1477355659008026},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.13418835401535034},{"id":"https://openalex.org/keywords/code-rate","display_name":"Code rate","score":0.11263000965118408},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.10776644945144653}],"concepts":[{"id":"https://openalex.org/C46900642","wikidata":"https://www.wikidata.org/wiki/Q2647","display_name":"Huffman coding","level":3,"score":0.8774669170379639},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8137620091438293},{"id":"https://openalex.org/C115223089","wikidata":"https://www.wikidata.org/wiki/Q4885542","display_name":"Canonical Huffman code","level":5,"score":0.7014347314834595},{"id":"https://openalex.org/C56005371","wikidata":"https://www.wikidata.org/wiki/Q209860","display_name":"PowerPC","level":3,"score":0.6699120998382568},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.5752905011177063},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5540689826011658},{"id":"https://openalex.org/C78548338","wikidata":"https://www.wikidata.org/wiki/Q2493","display_name":"Data compression","level":2,"score":0.5432960987091064},{"id":"https://openalex.org/C2776760102","wikidata":"https://www.wikidata.org/wiki/Q5139990","display_name":"Code (set theory)","level":3,"score":0.5065065622329712},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4526916444301605},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4237307012081146},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3901136517524719},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3870643377304077},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.21266862750053406},{"id":"https://openalex.org/C70992990","wikidata":"https://www.wikidata.org/wiki/Q1681587","display_name":"Systematic code","level":4,"score":0.1477355659008026},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.13418835401535034},{"id":"https://openalex.org/C206468330","wikidata":"https://www.wikidata.org/wiki/Q834373","display_name":"Code rate","level":3,"score":0.11263000965118408},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.10776644945144653},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/sbcci.2013.6644870","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sbcci.2013.6644870","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1493249179","https://openalex.org/W1573170655","https://openalex.org/W1686420892","https://openalex.org/W2012509783","https://openalex.org/W2032094184","https://openalex.org/W2060108852","https://openalex.org/W2061678112","https://openalex.org/W2134660057","https://openalex.org/W2159426109","https://openalex.org/W3140448691","https://openalex.org/W4230156582","https://openalex.org/W4232751114","https://openalex.org/W4253898506","https://openalex.org/W6634451901","https://openalex.org/W6666071699","https://openalex.org/W6680336689"],"related_works":["https://openalex.org/W1518463267","https://openalex.org/W2393846133","https://openalex.org/W2156080995","https://openalex.org/W2385622179","https://openalex.org/W2025845352","https://openalex.org/W4287181776","https://openalex.org/W4387740266","https://openalex.org/W2000710025","https://openalex.org/W2181792186","https://openalex.org/W2158701093"],"abstract_inverted_index":{"This":[0,23],"paper":[1],"proposes":[2],"a":[3],"new":[4],"method":[5,24,72],"of":[6],"code":[7,34,74],"compression":[8,27,35],"for":[9,83],"embedded":[10,64],"systems":[11],"called":[12],"by":[13,49],"us":[14],"as":[15],"CC-MLD":[16],"(Compressed":[17],"Code":[18],"using":[19,55,92],"Huffman-Based":[20],"Multi-Level":[21],"Dictionary).":[22],"applies":[25],"two":[26,43],"techniques":[28],"and":[29,45,59,69,94,96],"it":[30,46],"uses":[31],"the":[32,90],"Huffman":[33],"algorithm.":[36],"A":[37],"single":[38],"dictionary":[39],"is":[40,47],"divided":[41],"into":[42],"levels":[44],"shared":[48],"both":[50],"techniques.":[51],"We":[52,87],"performed":[53],"simulations":[54],"applications":[56],"from":[57,102],"MiBench":[58],"we":[60,97],"have":[61,88],"used":[62],"four":[63,85],"processors":[65],"(ARM,":[66],"MIPS,":[67],"PowerPC":[68],"SPARC).":[70],"Our":[71],"reduces":[73],"size":[75],"up":[76],"to":[77],"30.6%":[78],"(including":[79],"all":[80],"extra":[81],"costs":[82],"these":[84],"platforms).":[86],"implemented":[89],"decompressor":[91],"VHDL":[93],"FPGA":[95],"obtained":[98],"only":[99],"one":[100],"clock":[101],"decompression":[103],"process.":[104]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
