{"id":"https://openalex.org/W4234658794","doi":"https://doi.org/10.1109/sbcci.2003.1232835","title":"Efficient processor instruction set extension by asynchronous reconfigurable datapath integration","display_name":"Efficient processor instruction set extension by asynchronous reconfigurable datapath integration","publication_year":2004,"publication_date":"2004-01-23","ids":{"openalex":"https://openalex.org/W4234658794","doi":"https://doi.org/10.1109/sbcci.2003.1232835"},"language":"en","primary_location":{"id":"doi:10.1109/sbcci.2003.1232835","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sbcci.2003.1232835","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"16th Symposium on Integrated Circuits and Systems Design, 2003. SBCCI 2003. Proceedings.","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5016444254","display_name":"J. Becker","orcid":null},"institutions":[{"id":"https://openalex.org/I4210088543","display_name":"Institut f\u00fcr Informationsverarbeitung","ror":"https://ror.org/0047j9t38","country_code":"DE","type":"facility","lineage":["https://openalex.org/I4210088543"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"J. Becker","raw_affiliation_strings":["Institut fuer Technik der Informationsverarbeitung, Universitaet Karlsruhe, Karlsruhe, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institut fuer Technik der Informationsverarbeitung, Universitaet Karlsruhe, Karlsruhe, Germany","institution_ids":["https://openalex.org/I4210088543"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053120493","display_name":"A. Thomas","orcid":null},"institutions":[{"id":"https://openalex.org/I4210088543","display_name":"Institut f\u00fcr Informationsverarbeitung","ror":"https://ror.org/0047j9t38","country_code":"DE","type":"facility","lineage":["https://openalex.org/I4210088543"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"A. Thomas","raw_affiliation_strings":["Institut fuer Technik der Informationsverarbeitung, Universitaet Karlsruhe, Karlsruhe, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institut fuer Technik der Informationsverarbeitung, Universitaet Karlsruhe, Karlsruhe, Germany","institution_ids":["https://openalex.org/I4210088543"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5001019242","display_name":"M. Scheer","orcid":null},"institutions":[{"id":"https://openalex.org/I4210088543","display_name":"Institut f\u00fcr Informationsverarbeitung","ror":"https://ror.org/0047j9t38","country_code":"DE","type":"facility","lineage":["https://openalex.org/I4210088543"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"M. Scheer","raw_affiliation_strings":["Institut fuer Technik der Informationsverarbeitung, Universitaet Karlsruhe, Karlsruhe, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institut fuer Technik der Informationsverarbeitung, Universitaet Karlsruhe, Karlsruhe, Germany","institution_ids":["https://openalex.org/I4210088543"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I4210088543"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"237","last_page":"242"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/datapath","display_name":"Datapath","score":0.9677936434745789},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8081782460212708},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.7091109752655029},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.6383305788040161},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.5814228653907776},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5164458751678467},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4516240954399109},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.44201523065567017},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.4377967417240143},{"id":"https://openalex.org/keywords/reduced-instruction-set-computing","display_name":"Reduced instruction set computing","score":0.41749900579452515}],"concepts":[{"id":"https://openalex.org/C2781198647","wikidata":"https://www.wikidata.org/wiki/Q1633673","display_name":"Datapath","level":2,"score":0.9677936434745789},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8081782460212708},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.7091109752655029},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.6383305788040161},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.5814228653907776},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5164458751678467},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4516240954399109},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.44201523065567017},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.4377967417240143},{"id":"https://openalex.org/C126298526","wikidata":"https://www.wikidata.org/wiki/Q189376","display_name":"Reduced instruction set computing","level":3,"score":0.41749900579452515},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/sbcci.2003.1232835","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sbcci.2003.1232835","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"16th Symposium on Integrated Circuits and Systems Design, 2003. SBCCI 2003. Proceedings.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.7799999713897705}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1837279029","https://openalex.org/W1939615570","https://openalex.org/W2083868341","https://openalex.org/W2146665136","https://openalex.org/W2346756768","https://openalex.org/W4243165422","https://openalex.org/W6704836821"],"related_works":["https://openalex.org/W2070693700","https://openalex.org/W2170506987","https://openalex.org/W2162921448","https://openalex.org/W2100984465","https://openalex.org/W1588764976","https://openalex.org/W2129565950","https://openalex.org/W4247613350","https://openalex.org/W2019183874","https://openalex.org/W2114044010","https://openalex.org/W2051103499"],"abstract_inverted_index":{"Nowadays,":[0],"the":[1,34,49,71,123,132,138],"datapaths":[2,32],"of":[3,17,48,122,137],"modern":[4],"microprocessors":[5],"reach":[6],"their":[7],"limits":[8],"by":[9,28],"using":[10],"static":[11,31,80],"instruction":[12,82],"sets.":[13],"A":[14],"way":[15],"out":[16],"this":[18],"limitations":[19],"is":[20,76],"a":[21,43,59,97],"dynamic":[22,36],"reconfigurable":[23,37],"processor":[24,75],"datapath":[25,51,83],"extension":[26],"achieved":[27],"integrating":[29],"traditional":[30],"with":[33],"coarse-grain":[35],"XPP-architecture":[38],"(extreme":[39],"processing":[40],"platform).":[41],"Therefore,":[42],"loosely":[44],"asynchronous":[45,120],"coupling":[46,117],"mechanism":[47],"corresponding":[50],"units":[52],"has":[53,84],"been":[54,85],"developed":[55],"and":[56,90,99,134],"integrated":[57,130],"onto":[58],"CMOS":[60],"0.13":[61],"/spl":[62],"mu/m":[63],"in":[64,103],"standard":[65],"cell":[66],"technology":[67],"from":[68],"UMC.":[69],"Here":[70],"SPARC":[72],"compatible":[73],"LEON":[74,139],"used,":[77],"whereas":[78],"its":[79],"pipelined":[81],"extended":[86],"to":[87],"be":[88],"configured":[89,125],"personalized":[91],"for":[92],"specific":[93],"applications.":[94],"This":[95],"allows":[96,119],"various":[98],"efficient":[100],"use,":[101],"e.g.":[102],"streaming":[104],"application":[105],"domains":[106],"like":[107],"MPEG-4,":[108],"digital":[109],"filters,":[110],"mobile":[111],"communication":[112],"modulation,":[113],"etc.":[114],"The":[115],"chosen":[116],"technique":[118],"concurrency":[121],"additionally":[124],"compound":[126],"instructions,":[127],"which":[128],"are":[129],"into":[131],"programming":[133],"compilation":[135],"environment":[136],"processor.":[140]},"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}