{"id":"https://openalex.org/W2015009399","doi":"https://doi.org/10.1109/sasp.2011.5941073","title":"Integrating formal verification and high-level processor pipeline synthesis","display_name":"Integrating formal verification and high-level processor pipeline synthesis","publication_year":2011,"publication_date":"2011-06-01","ids":{"openalex":"https://openalex.org/W2015009399","doi":"https://doi.org/10.1109/sasp.2011.5941073","mag":"2015009399"},"language":"en","primary_location":{"id":"doi:10.1109/sasp.2011.5941073","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sasp.2011.5941073","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 IEEE 9th Symposium on Application Specific Processors (SASP)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084078152","display_name":"Eriko Nurvitadhi","orcid":"https://orcid.org/0000-0002-2347-9590"},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Eriko Nurvitadhi","raw_affiliation_strings":["Carnegie Mellon University, USA","Carnegie Mellon Univ (USA)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Carnegie Mellon University, USA","institution_ids":["https://openalex.org/I74973139"]},{"raw_affiliation_string":"Carnegie Mellon Univ (USA)","institution_ids":["https://openalex.org/I74973139"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019376179","display_name":"James C. Hoe","orcid":"https://orcid.org/0000-0002-9302-5287"},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"James C. Hoe","raw_affiliation_strings":["Carnegie Mellon University, USA","Carnegie Mellon Univ (USA)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Carnegie Mellon University, USA","institution_ids":["https://openalex.org/I74973139"]},{"raw_affiliation_string":"Carnegie Mellon Univ (USA)","institution_ids":["https://openalex.org/I74973139"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019748531","display_name":"Timothy Kam","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Timothy Kam","raw_affiliation_strings":["Intel Corporation, USA","Intel Corp., USA#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corp., USA#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5113526607","display_name":"Shih\u2010Lien L. Lu","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shih-Lien L. Lu","raw_affiliation_strings":["Intel Corporation, USA","Intel Corp., USA#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corp., USA#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.09801552,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"22","last_page":"29"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10743","display_name":"Software Testing and Debugging Techniques","score":0.9968000054359436,"subfield":{"id":"https://openalex.org/subfields/1712","display_name":"Software"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8519632816314697},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.6441700458526611},{"id":"https://openalex.org/keywords/formal-equivalence-checking","display_name":"Formal equivalence checking","score":0.6358317136764526},{"id":"https://openalex.org/keywords/formal-verification","display_name":"Formal verification","score":0.6292610168457031},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.6029288172721863},{"id":"https://openalex.org/keywords/model-checking","display_name":"Model checking","score":0.5830721259117126},{"id":"https://openalex.org/keywords/formal-specification","display_name":"Formal specification","score":0.5628427863121033},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.505389928817749},{"id":"https://openalex.org/keywords/reduced-instruction-set-computing","display_name":"Reduced instruction set computing","score":0.4998021125793457},{"id":"https://openalex.org/keywords/formal-methods","display_name":"Formal methods","score":0.4951225817203522},{"id":"https://openalex.org/keywords/equivalence","display_name":"Equivalence (formal languages)","score":0.4756830930709839},{"id":"https://openalex.org/keywords/functional-verification","display_name":"Functional verification","score":0.4400627017021179},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3514080047607422},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.33761143684387207},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.28295058012008667},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.09898069500923157}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8519632816314697},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.6441700458526611},{"id":"https://openalex.org/C96654402","wikidata":"https://www.wikidata.org/wiki/Q5469962","display_name":"Formal equivalence checking","level":3,"score":0.6358317136764526},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.6292610168457031},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.6029288172721863},{"id":"https://openalex.org/C110251889","wikidata":"https://www.wikidata.org/wiki/Q1569697","display_name":"Model checking","level":2,"score":0.5830721259117126},{"id":"https://openalex.org/C116253237","wikidata":"https://www.wikidata.org/wiki/Q1437424","display_name":"Formal specification","level":2,"score":0.5628427863121033},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.505389928817749},{"id":"https://openalex.org/C126298526","wikidata":"https://www.wikidata.org/wiki/Q189376","display_name":"Reduced instruction set computing","level":3,"score":0.4998021125793457},{"id":"https://openalex.org/C75606506","wikidata":"https://www.wikidata.org/wiki/Q1049183","display_name":"Formal methods","level":2,"score":0.4951225817203522},{"id":"https://openalex.org/C2780069185","wikidata":"https://www.wikidata.org/wiki/Q7977945","display_name":"Equivalence (formal languages)","level":2,"score":0.4756830930709839},{"id":"https://openalex.org/C62460635","wikidata":"https://www.wikidata.org/wiki/Q5508853","display_name":"Functional verification","level":3,"score":0.4400627017021179},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3514080047607422},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.33761143684387207},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.28295058012008667},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.09898069500923157},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/sasp.2011.5941073","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sasp.2011.5941073","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 IEEE 9th Symposium on Application Specific Processors (SASP)","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.691.6352","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.691.6352","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://users.ece.cmu.edu/%7Ejhoe/distribution/2011/sasp11.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1489215519","https://openalex.org/W1514254856","https://openalex.org/W1553731663","https://openalex.org/W1574967808","https://openalex.org/W1741528175","https://openalex.org/W2012471639","https://openalex.org/W2054151020","https://openalex.org/W2097027490","https://openalex.org/W2105279414","https://openalex.org/W2123905682","https://openalex.org/W2155558546","https://openalex.org/W2161038820","https://openalex.org/W2167198758","https://openalex.org/W2340735175","https://openalex.org/W3144256380","https://openalex.org/W4244878519","https://openalex.org/W6629262790","https://openalex.org/W6634546602"],"related_works":["https://openalex.org/W2106507440","https://openalex.org/W3023586562","https://openalex.org/W2162615969","https://openalex.org/W2349037334","https://openalex.org/W2056847529","https://openalex.org/W4283699709","https://openalex.org/W2004144979","https://openalex.org/W2096723742","https://openalex.org/W1863066700","https://openalex.org/W2167855737"],"abstract_inverted_index":{"When":[0],"a":[1,7,42],"processor":[2,44,71],"implementation":[3,14,72],"is":[4],"synthesized":[5],"from":[6],"specification":[8,21],"using":[9],"an":[10,49],"automatic":[11,25],"framework,":[12],"this":[13,101],"still":[15],"should":[16],"be":[17],"verified":[18],"against":[19],"its":[20,74],"to":[22,87,104],"ensure":[23],"the":[24,53,64,68],"framework":[26,57,103],"introduced":[27],"no":[28],"error.":[29],"This":[30],"paper":[31,95],"presents":[32],"our":[33,56],"effort":[34],"in":[35],"integrating":[36],"fully":[37],"automated":[38],"formal":[39],"verification":[40],"with":[41],"high-level":[43],"pipeline":[45,54],"synthesis":[46],"framework.":[47],"As":[48],"integral":[50],"part":[51],"of":[52,99],"synthesis,":[55],"also":[58],"emits":[59],"SMV":[60],"models":[61],"for":[62],"checking":[63,82],"functional":[65],"equivalence":[66],"between":[67],"output":[69],"pipelined":[70,109],"and":[73,106,111],"input":[75],"non-pipelined":[76],"specification.":[77],"Well":[78],"known":[79],"compositional":[80],"model":[81,92],"techniques":[83],"are":[84],"automatically":[85],"applied":[86],"curtail":[88],"state":[89],"explosion":[90],"during":[91],"checking.":[93],"The":[94],"reports":[96],"case":[97],"studies":[98],"applying":[100],"integrated":[102],"synthesize":[105],"formally":[107],"verify":[108],"RISC":[110],"CISC":[112],"processors.":[113]},"counts_by_year":[{"year":2024,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
