{"id":"https://openalex.org/W2158382962","doi":"https://doi.org/10.1109/sasp.2008.4570792","title":"System-Level Performance Estimation for Application-Specific MPSoC Interconnect Synthesis","display_name":"System-Level Performance Estimation for Application-Specific MPSoC Interconnect Synthesis","publication_year":2008,"publication_date":"2008-06-01","ids":{"openalex":"https://openalex.org/W2158382962","doi":"https://doi.org/10.1109/sasp.2008.4570792","mag":"2158382962"},"language":"en","primary_location":{"id":"doi:10.1109/sasp.2008.4570792","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sasp.2008.4570792","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 Symposium on Application Specific Processors","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5017407017","display_name":"Po-Kuan Huang","orcid":null},"institutions":[{"id":"https://openalex.org/I84218800","display_name":"University of California, Davis","ror":"https://ror.org/05rrcem69","country_code":"US","type":"education","lineage":["https://openalex.org/I84218800"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Po-Kuan Huang","raw_affiliation_strings":["Electrical and Computer Engineering, University of California, Davis, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, University of California, Davis, CA, USA","institution_ids":["https://openalex.org/I84218800"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012266656","display_name":"Matin Hashemi","orcid":"https://orcid.org/0000-0003-4090-6678"},"institutions":[{"id":"https://openalex.org/I84218800","display_name":"University of California, Davis","ror":"https://ror.org/05rrcem69","country_code":"US","type":"education","lineage":["https://openalex.org/I84218800"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Matin Hashemi","raw_affiliation_strings":["Electrical and Computer Engineering, University of California, Davis, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, University of California, Davis, CA, USA","institution_ids":["https://openalex.org/I84218800"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5031842294","display_name":"Soheil Ghiasi","orcid":"https://orcid.org/0000-0002-1036-791X"},"institutions":[{"id":"https://openalex.org/I84218800","display_name":"University of California, Davis","ror":"https://ror.org/05rrcem69","country_code":"US","type":"education","lineage":["https://openalex.org/I84218800"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Soheil Ghiasi","raw_affiliation_strings":["Electrical and Computer Engineering, University of California, Davis, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, University of California, Davis, CA, USA","institution_ids":["https://openalex.org/I84218800"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I84218800"],"apc_list":null,"apc_paid":null,"fwci":0.7637,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":{"value":0.69596883,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"95","last_page":"100"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/mpsoc","display_name":"MPSoC","score":0.8794077634811401},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8234566450119019},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.7700050473213196},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.615587592124939},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.557064414024353},{"id":"https://openalex.org/keywords/fidelity","display_name":"Fidelity","score":0.5147302150726318},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.5017616748809814},{"id":"https://openalex.org/keywords/estimator","display_name":"Estimator","score":0.4789431691169739},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.4518425762653351},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4466637074947357},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.41496020555496216},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.36268216371536255},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.132207989692688}],"concepts":[{"id":"https://openalex.org/C2777187653","wikidata":"https://www.wikidata.org/wiki/Q975106","display_name":"MPSoC","level":3,"score":0.8794077634811401},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8234566450119019},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.7700050473213196},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.615587592124939},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.557064414024353},{"id":"https://openalex.org/C2776459999","wikidata":"https://www.wikidata.org/wiki/Q2119376","display_name":"Fidelity","level":2,"score":0.5147302150726318},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.5017616748809814},{"id":"https://openalex.org/C185429906","wikidata":"https://www.wikidata.org/wiki/Q1130160","display_name":"Estimator","level":2,"score":0.4789431691169739},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.4518425762653351},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4466637074947357},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.41496020555496216},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.36268216371536255},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.132207989692688},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/sasp.2008.4570792","is_oa":false,"landing_page_url":"https://doi.org/10.1109/sasp.2008.4570792","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 Symposium on Application Specific Processors","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W571312295","https://openalex.org/W1535347731","https://openalex.org/W1568192366","https://openalex.org/W2046101668","https://openalex.org/W2072794470","https://openalex.org/W2091158003","https://openalex.org/W2101431901","https://openalex.org/W2102623271","https://openalex.org/W2107635778","https://openalex.org/W2134408405","https://openalex.org/W2149236729","https://openalex.org/W2164084134","https://openalex.org/W2169666835","https://openalex.org/W3142161140","https://openalex.org/W4230793013","https://openalex.org/W4249840435","https://openalex.org/W6632165618","https://openalex.org/W6675296838","https://openalex.org/W6682215925"],"related_works":["https://openalex.org/W2092181573","https://openalex.org/W2576551918","https://openalex.org/W2056447856","https://openalex.org/W2998838928","https://openalex.org/W2783693002","https://openalex.org/W4281926497","https://openalex.org/W3043614744","https://openalex.org/W2105957719","https://openalex.org/W1973069902","https://openalex.org/W2124403023"],"abstract_inverted_index":{"We":[0,18,54],"present":[1],"a":[2,56],"framework":[3],"for":[4,30],"development":[5],"of":[6,51,58,108],"streaming":[7,59],"applications":[8,60],"as":[9],"concurrent":[10],"software":[11],"modules":[12],"running":[13],"on":[14,61,67],"multi-processors":[15],"system-on-chips":[16],"(MPSoC).":[17],"propose":[19],"an":[20,68],"iterative":[21],"design":[22,93],"space":[23,94],"exploration":[24,36,95],"mechanism":[25],"to":[26,34,105],"customize":[27],"MPSoC":[28],"architecture":[29],"given":[31],"applications.":[32],"Central":[33],"the":[35],"engine":[37],"is":[38],"our":[39,74,111],"system-level":[40,75,112],"performance":[41,76],"estimation":[42,77],"methodology,":[43],"that":[44,64,73],"both":[45],"quickly":[46],"and":[47,120],"accurately":[48],"determine":[49],"quality":[50],"candidate":[52,62,102],"architectures.":[53,103],"implemented":[55],"number":[57],"architectures":[63],"were":[65],"emulated":[66],"FPGA.":[69],"Hardware":[70],"measurements":[71],"show":[72],"method":[78],"incurs":[79],"only":[80],"15%":[81],"error":[82],"in":[83,100],"predicting":[84],"application":[85],"throughput.":[86],"More":[87],"importantly,":[88],"it":[89],"always":[90],"correctly":[91],"guides":[92],"by":[96],"achieving":[97],"100%":[98],"fidelity":[99],"quality-ranking":[101],"Compared":[104],"behavioral":[106],"simulation":[107],"compiled":[109],"code,":[110],"estimator":[113],"runs":[114],"more":[115],"than":[116],"12":[117],"times":[118,123],"faster,":[119],"requires":[121],"7":[122],"less":[124],"memory.":[125]},"counts_by_year":[{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2012,"cited_by_count":3}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}