{"id":"https://openalex.org/W2576551918","doi":"https://doi.org/10.1109/samos.2016.7818368","title":"Perspectives on system-level MPSoC design space exploration","display_name":"Perspectives on system-level MPSoC design space exploration","publication_year":2016,"publication_date":"2016-07-01","ids":{"openalex":"https://openalex.org/W2576551918","doi":"https://doi.org/10.1109/samos.2016.7818368","mag":"2576551918"},"language":"en","primary_location":{"id":"doi:10.1109/samos.2016.7818368","is_oa":false,"landing_page_url":"https://doi.org/10.1109/samos.2016.7818368","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084046597","display_name":"Andy D. Pimentel","orcid":"https://orcid.org/0000-0002-2043-4469"},"institutions":[{"id":"https://openalex.org/I865915315","display_name":"Vrije Universiteit Amsterdam","ror":"https://ror.org/008xxew50","country_code":"NL","type":"education","lineage":["https://openalex.org/I865915315"]},{"id":"https://openalex.org/I887064364","display_name":"University of Amsterdam","ror":"https://ror.org/04dkp9463","country_code":"NL","type":"education","lineage":["https://openalex.org/I887064364"]}],"countries":["NL"],"is_corresponding":true,"raw_author_name":"Andy Pimentel","raw_affiliation_strings":["Universiteit van Amsterdam, Amsterdam, Noord-Holland, NL"],"affiliations":[{"raw_affiliation_string":"Universiteit van Amsterdam, Amsterdam, Noord-Holland, NL","institution_ids":["https://openalex.org/I865915315","https://openalex.org/I887064364"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5084046597"],"corresponding_institution_ids":["https://openalex.org/I865915315","https://openalex.org/I887064364"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.16813993,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"335","last_page":"335"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/mpsoc","display_name":"MPSoC","score":0.9487112760543823},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.82391357421875},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7640749216079712},{"id":"https://openalex.org/keywords/electronic-system-level-design-and-verification","display_name":"Electronic system-level design and verification","score":0.6326818466186523},{"id":"https://openalex.org/keywords/abstraction-layer","display_name":"Abstraction layer","score":0.5773792266845703},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5448659658432007},{"id":"https://openalex.org/keywords/abstraction","display_name":"Abstraction","score":0.5440598726272583},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.5292201638221741},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5107486248016357},{"id":"https://openalex.org/keywords/systems-design","display_name":"Systems design","score":0.49738267064094543},{"id":"https://openalex.org/keywords/design-process","display_name":"Design process","score":0.4674302935600281},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.456104576587677},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.44056564569473267},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.425794780254364},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.2845412790775299},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.2494153082370758},{"id":"https://openalex.org/keywords/work-in-process","display_name":"Work in process","score":0.15226784348487854},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12761586904525757},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.10296827554702759}],"concepts":[{"id":"https://openalex.org/C2777187653","wikidata":"https://www.wikidata.org/wiki/Q975106","display_name":"MPSoC","level":3,"score":0.9487112760543823},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.82391357421875},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7640749216079712},{"id":"https://openalex.org/C77495112","wikidata":"https://www.wikidata.org/wiki/Q5358436","display_name":"Electronic system-level design and verification","level":2,"score":0.6326818466186523},{"id":"https://openalex.org/C147358964","wikidata":"https://www.wikidata.org/wiki/Q1200992","display_name":"Abstraction layer","level":3,"score":0.5773792266845703},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5448659658432007},{"id":"https://openalex.org/C124304363","wikidata":"https://www.wikidata.org/wiki/Q673661","display_name":"Abstraction","level":2,"score":0.5440598726272583},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.5292201638221741},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5107486248016357},{"id":"https://openalex.org/C31352089","wikidata":"https://www.wikidata.org/wiki/Q3750474","display_name":"Systems design","level":2,"score":0.49738267064094543},{"id":"https://openalex.org/C48262172","wikidata":"https://www.wikidata.org/wiki/Q16908765","display_name":"Design process","level":3,"score":0.4674302935600281},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.456104576587677},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.44056564569473267},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.425794780254364},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.2845412790775299},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.2494153082370758},{"id":"https://openalex.org/C174998907","wikidata":"https://www.wikidata.org/wiki/Q357662","display_name":"Work in process","level":2,"score":0.15226784348487854},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12761586904525757},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.10296827554702759},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/samos.2016.7818368","is_oa":false,"landing_page_url":"https://doi.org/10.1109/samos.2016.7818368","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.4399999976158142,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2336368137","https://openalex.org/W2783693002","https://openalex.org/W2576551918","https://openalex.org/W4294611724","https://openalex.org/W2998838928","https://openalex.org/W2292393553","https://openalex.org/W4250379102","https://openalex.org/W2099748200","https://openalex.org/W2133408453","https://openalex.org/W2144666235"],"abstract_inverted_index":{"The":[0,78],"complexity":[1],"of":[2,21,24,46,60,66,72,85,95,133,146,158],"modern":[3],"embedded":[4],"systems,":[5],"which":[6],"are":[7,107],"increasingly":[8],"based":[9],"on":[10,165],"heterogeneous":[11],"multiprocessor":[12],"system-on-chip":[13],"(MPSoC)":[14],"architectures,":[15],"has":[16],"led":[17],"to":[18,52,63,123,189],"the":[19,22,32,43,47,58,70,83,103,118,142,147,159],"emergence":[20],"field":[23],"system-level":[25,35,166],"design":[26,33,36,48,121,125,138],"and":[27,37,69,76,88,106,112,181],"synthesis.":[28],"To":[29],"cope":[30],"with":[31],"complexity,":[34],"synthesis":[38],"methods":[39],"aim":[40],"at":[41,91],"raising":[42],"abstraction":[44],"level":[45,94],"process.":[49],"Key":[50],"enablers":[51],"this":[53,151,193],"end":[54],"are,":[55],"for":[56,81,109,173],"example,":[57],"use":[59],"architectural":[61],"platforms":[62],"facilitate":[64],"re-use":[65],"IP":[67],"components":[68,87],"notion":[71],"high-level":[73,100],"system":[74],"modelling":[75],"simulation.":[77],"latter":[79],"allows":[80],"capturing":[82],"behavior":[84],"platform":[86],"their":[89],"interactions":[90],"a":[92],"high":[93],"abstraction.":[96],"As":[97],"such,":[98],"these":[99],"models":[101],"minimize":[102],"modeling":[104],"effort":[105],"optimized":[108],"execution":[110],"speed,":[111],"can":[113],"therefore":[114],"be":[115,190],"applied":[116],"during":[117],"very":[119],"early":[120,130,137],"stages":[122],"perform":[124],"space":[126],"exploration":[127],"(DSE).":[128],"Such":[129],"DSE":[131,172],"is":[132],"paramount":[134],"importance":[135],"as":[136,170,175,177],"choices":[139],"heavily":[140],"influence":[141],"success":[143],"or":[144],"failure":[145],"final":[148],"product.":[149],"In":[150],"talk,":[152],"I":[153],"will":[154,182],"provide":[155],"an":[156],"overview":[157],"recent":[160],"advances":[161],"in":[162,192],"our":[163],"research":[164],"MPSoC":[167],"DSE,":[168],"such":[169],"scenario-based":[171],"design-time":[174],"well":[176],"run-time":[178],"application":[179],"mapping,":[180],"present":[183],"some":[184],"future":[185],"challenges":[186],"that":[187],"need":[188],"addressed":[191],"domain.":[194]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}