{"id":"https://openalex.org/W2577064214","doi":"https://doi.org/10.1109/samos.2016.7818360","title":"Transforming nanodevices to next generation nanosystems","display_name":"Transforming nanodevices to next generation nanosystems","publication_year":2016,"publication_date":"2016-07-01","ids":{"openalex":"https://openalex.org/W2577064214","doi":"https://doi.org/10.1109/samos.2016.7818360","mag":"2577064214"},"language":"en","primary_location":{"id":"doi:10.1109/samos.2016.7818360","is_oa":false,"landing_page_url":"https://doi.org/10.1109/samos.2016.7818360","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5061843047","display_name":"Max M. Shulaker","orcid":"https://orcid.org/0000-0003-2237-193X"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Max Marcel Shulaker","raw_affiliation_strings":["Deparment of Computer Science, Stanford University, Stanford, CA, USA"],"affiliations":[{"raw_affiliation_string":"Deparment of Computer Science, Stanford University, Stanford, CA, USA","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003214642","display_name":"Gage Hills","orcid":"https://orcid.org/0000-0002-4912-814X"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Gage Hills","raw_affiliation_strings":["Deparment of Computer Science, Stanford University, Stanford, CA, USA"],"affiliations":[{"raw_affiliation_string":"Deparment of Computer Science, Stanford University, Stanford, CA, USA","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059975258","display_name":"H.\u2010S. Philip Wong","orcid":"https://orcid.org/0000-0002-0096-1472"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"H.-S. Philip Wong","raw_affiliation_strings":["Deparment of Computer Science, Stanford University, Stanford, CA, USA"],"affiliations":[{"raw_affiliation_string":"Deparment of Computer Science, Stanford University, Stanford, CA, USA","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5036312663","display_name":"Subhasish Mitra","orcid":"https://orcid.org/0000-0002-5572-5194"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Subhasish Mitra","raw_affiliation_strings":["Deparment of Computer Science, Stanford University, Stanford, CA, USA"],"affiliations":[{"raw_affiliation_string":"Deparment of Computer Science, Stanford University, Stanford, CA, USA","institution_ids":["https://openalex.org/I97018004"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5061843047"],"corresponding_institution_ids":["https://openalex.org/I97018004"],"apc_list":null,"apc_paid":null,"fwci":0.1874,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.61016304,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"100","issue":null,"first_page":"288","last_page":"292"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/leverage","display_name":"Leverage (statistics)","score":0.5680035352706909},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5268092155456543},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5226885080337524},{"id":"https://openalex.org/keywords/electronics","display_name":"Electronics","score":0.4801694452762604},{"id":"https://openalex.org/keywords/nanotechnology","display_name":"Nanotechnology","score":0.47263237833976746},{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.4643336534500122},{"id":"https://openalex.org/keywords/emerging-technologies","display_name":"Emerging technologies","score":0.4410727024078369},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.41222742199897766},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.3220856189727783},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2621576189994812},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2396877408027649},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.11739775538444519}],"concepts":[{"id":"https://openalex.org/C153083717","wikidata":"https://www.wikidata.org/wiki/Q6535263","display_name":"Leverage (statistics)","level":2,"score":0.5680035352706909},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5268092155456543},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5226885080337524},{"id":"https://openalex.org/C138331895","wikidata":"https://www.wikidata.org/wiki/Q11650","display_name":"Electronics","level":2,"score":0.4801694452762604},{"id":"https://openalex.org/C171250308","wikidata":"https://www.wikidata.org/wiki/Q11468","display_name":"Nanotechnology","level":1,"score":0.47263237833976746},{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.4643336534500122},{"id":"https://openalex.org/C207267971","wikidata":"https://www.wikidata.org/wiki/Q120208","display_name":"Emerging technologies","level":2,"score":0.4410727024078369},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.41222742199897766},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.3220856189727783},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2621576189994812},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2396877408027649},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.11739775538444519},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/samos.2016.7818360","is_oa":false,"landing_page_url":"https://doi.org/10.1109/samos.2016.7818360","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8700000047683716,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320315684","display_name":"Stanford SystemX Alliance","ror":null}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":23,"referenced_works":["https://openalex.org/W1967540748","https://openalex.org/W1985946905","https://openalex.org/W1991122463","https://openalex.org/W1995969856","https://openalex.org/W1996608645","https://openalex.org/W2004823737","https://openalex.org/W2008911167","https://openalex.org/W2026621494","https://openalex.org/W2037616057","https://openalex.org/W2063456051","https://openalex.org/W2067627272","https://openalex.org/W2079942837","https://openalex.org/W2105827747","https://openalex.org/W2118703320","https://openalex.org/W2126810113","https://openalex.org/W2132030826","https://openalex.org/W2132729131","https://openalex.org/W2135117395","https://openalex.org/W2159568563","https://openalex.org/W2168402089","https://openalex.org/W2209394967","https://openalex.org/W2997147979","https://openalex.org/W4242887565"],"related_works":["https://openalex.org/W2545245183","https://openalex.org/W2054635671","https://openalex.org/W2017425642","https://openalex.org/W2350916061","https://openalex.org/W1970117475","https://openalex.org/W3161624601","https://openalex.org/W2611512961","https://openalex.org/W2078381924","https://openalex.org/W4206468571","https://openalex.org/W4381388454"],"abstract_inverted_index":{"The":[0],"computing":[1],"demands":[2],"of":[3,11,38,65,117],"future":[4],"data-intensive":[5],"applications":[6],"far":[7],"exceed":[8],"the":[9,35],"capabilities":[10],"today's":[12,85],"electronics,":[13],"and":[14,52,79,139],"cannot":[15],"be":[16,107],"met":[17],"by":[18,102,126],"isolated":[19],"improvements":[20],"in":[21,69,129],"transistor":[22],"technologies":[23,142],"or":[24],"integrated":[25],"circuit":[26],"(IC)":[27],"architectures":[28,64,74],"alone.":[29],"Rather,":[30],"transformative":[31],"nano-systems,":[32],"which":[33],"leverage":[34],"unique":[36],"properties":[37],"emerging":[39,103,130,140],"nanotechnologies":[40,104,131],"to":[41,48,84,92],"create":[42],"new":[43],"IC":[44],"architectures,":[45],"are":[46,90,99],"required":[47],"deliver":[49],"unprecedented":[50],"performance":[51,78],"energy":[53,80],"efficiency.":[54],"For":[55],"instance,":[56],"monolithic":[57,122],"three-dimensional":[58],"integration":[59],"enables":[60],"revolutionary":[61],"digital":[62,72],"system":[63,73],"computation":[66],"finely":[67],"immersed":[68],"memory.":[70],"Such":[71],"can":[75,106],"achieve":[76],"significant":[77],"efficiency":[81],"benefits":[82],"compared":[83],"designs.":[86],"While":[87],"such":[88,132,143],"systems":[89],"challenging":[91],"realize":[93],"with":[94],"conventional":[95],"silicon-based":[96],"technologies,":[97],"they":[98],"naturally":[100],"enabled":[101,125],"that":[105],"fabricated":[108],"at":[109],"low":[110],"processing":[111],"temperatures.":[112],"We":[113],"present":[114],"an":[115],"overview":[116],"our":[118],"progress":[119],"toward":[120],"realizing":[121],"3D":[123],"ICs,":[124],"recent":[127],"advances":[128],"as":[133,144],"carbon":[134],"nanotube":[135],"field-effect":[136],"transistors":[137],"(CNFETs)":[138],"memory":[141],"Resistive":[145],"RAM":[146],"(RRAM).":[147]},"counts_by_year":[{"year":2019,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
