{"id":"https://openalex.org/W2577623973","doi":"https://doi.org/10.1109/samos.2016.7818359","title":"Racetrack memory-based encoder/decoder for low-power interconnect architectures","display_name":"Racetrack memory-based encoder/decoder for low-power interconnect architectures","publication_year":2016,"publication_date":"2016-07-01","ids":{"openalex":"https://openalex.org/W2577623973","doi":"https://doi.org/10.1109/samos.2016.7818359","mag":"2577623973"},"language":"en","primary_location":{"id":"doi:10.1109/samos.2016.7818359","is_oa":false,"landing_page_url":"https://doi.org/10.1109/samos.2016.7818359","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5050798347","display_name":"S. Deb","orcid":"https://orcid.org/0000-0001-7631-9163"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":true,"raw_author_name":"Suman Deb","raw_affiliation_strings":["School of Computer Science and Engineering, Nanyang Technological University, Singapore"],"affiliations":[{"raw_affiliation_string":"School of Computer Science and Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030240223","display_name":"Leibin Ni","orcid":"https://orcid.org/0000-0002-5480-3146"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Leibin Ni","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100432170","display_name":"Hao Yu","orcid":"https://orcid.org/0000-0001-8747-3203"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Hao Yu","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5089860351","display_name":"Anupam Chattopadhyay","orcid":"https://orcid.org/0000-0002-8818-6983"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Anupam Chattopadhyay","raw_affiliation_strings":["School of Computer Science and Engineering, Nanyang Technological University, Singapore"],"affiliations":[{"raw_affiliation_string":"School of Computer Science and Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5050798347"],"corresponding_institution_ids":["https://openalex.org/I172675005"],"apc_list":null,"apc_paid":null,"fwci":0.4354,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.70195438,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":96},"biblio":{"volume":"1","issue":null,"first_page":"281","last_page":"287"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10049","display_name":"Magnetic properties of thin films","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/3107","display_name":"Atomic and Molecular Physics, and Optics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10049","display_name":"Magnetic properties of thin films","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/3107","display_name":"Atomic and Molecular Physics, and Optics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/encoder","display_name":"Encoder","score":0.7643978595733643},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7386215925216675},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6337881684303284},{"id":"https://openalex.org/keywords/standby-power","display_name":"Standby power","score":0.5455202460289001},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4899424910545349},{"id":"https://openalex.org/keywords/encoding","display_name":"Encoding (memory)","score":0.4804689288139343},{"id":"https://openalex.org/keywords/low-power-electronics","display_name":"Low-power electronics","score":0.4768615663051605},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4768049418926239},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.4624621570110321},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.45892930030822754},{"id":"https://openalex.org/keywords/neuromorphic-engineering","display_name":"Neuromorphic engineering","score":0.43487048149108887},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.4284361004829407},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4116586446762085},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.38309168815612793},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3803842067718506},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.30539846420288086},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2430073618888855},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17678692936897278},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.13877546787261963},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.12331706285476685}],"concepts":[{"id":"https://openalex.org/C118505674","wikidata":"https://www.wikidata.org/wiki/Q42586063","display_name":"Encoder","level":2,"score":0.7643978595733643},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7386215925216675},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6337881684303284},{"id":"https://openalex.org/C7140552","wikidata":"https://www.wikidata.org/wiki/Q1366402","display_name":"Standby power","level":3,"score":0.5455202460289001},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4899424910545349},{"id":"https://openalex.org/C125411270","wikidata":"https://www.wikidata.org/wiki/Q18653","display_name":"Encoding (memory)","level":2,"score":0.4804689288139343},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.4768615663051605},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4768049418926239},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.4624621570110321},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.45892930030822754},{"id":"https://openalex.org/C151927369","wikidata":"https://www.wikidata.org/wiki/Q1981312","display_name":"Neuromorphic engineering","level":3,"score":0.43487048149108887},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.4284361004829407},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4116586446762085},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.38309168815612793},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3803842067718506},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.30539846420288086},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2430073618888855},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17678692936897278},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.13877546787261963},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.12331706285476685},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/samos.2016.7818359","is_oa":false,"landing_page_url":"https://doi.org/10.1109/samos.2016.7818359","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W1974831841","https://openalex.org/W1981443800","https://openalex.org/W1998241864","https://openalex.org/W2002711855","https://openalex.org/W2011081164","https://openalex.org/W2020583007","https://openalex.org/W2022691368","https://openalex.org/W2028260500","https://openalex.org/W2051648871","https://openalex.org/W2066877279","https://openalex.org/W2084316737","https://openalex.org/W2088213046","https://openalex.org/W2097065626","https://openalex.org/W2108543670","https://openalex.org/W2109458549","https://openalex.org/W2110113956","https://openalex.org/W2110276925","https://openalex.org/W2138444824","https://openalex.org/W2152061654","https://openalex.org/W2165072326","https://openalex.org/W2327846143","https://openalex.org/W4245524998"],"related_works":["https://openalex.org/W2368585244","https://openalex.org/W2347707557","https://openalex.org/W2136873993","https://openalex.org/W2187574435","https://openalex.org/W1528792662","https://openalex.org/W1510118898","https://openalex.org/W2127281320","https://openalex.org/W4238604499","https://openalex.org/W2906585799","https://openalex.org/W2155922832"],"abstract_inverted_index":{"Spin-based":[0],"memory":[1],"devices":[2],"offer":[3],"multiple":[4],"benefits,":[5],"like,":[6],"zero":[7],"standby":[8],"power,":[9],"fast":[10],"operation":[11],"speed":[12],"and":[13,29,47,87,97,158,162],"high":[14],"write":[15],"endurance.":[16],"Besides":[17],"for":[18,37,135],"storage":[19],"applications,":[20],"Spin":[21],"Torque":[22],"Transfer":[23],"(STT)-based":[24],"Magnetic":[25],"Tunnel":[26],"Junctions":[27],"(MTJs)":[28],"Racetrack":[30],"Memories":[31],"(RMs)":[32],"are":[33],"also":[34],"being":[35],"investigated":[36],"logic":[38],"operations,":[39],"especially":[40],"in":[41,71,85,131,160],"the":[42,65,82,93,111,147,150],"context":[43],"of":[44,57,68,95],"in-memory":[45],"computing":[46],"neuromorphic":[48],"architectures.":[49],"In":[50],"this":[51],"paper,":[52],"we":[53],"propose":[54],"spin-based":[55],"design":[56,101,113,139],"encoder/decoder":[58],"which":[59],"can":[60,102,114],"be":[61,103,115],"used":[62],"to":[63,80,105,117,146],"reduce":[64,81],"power":[66,83,133,164],"consumption":[67,84,134],"interconnect":[69],"architectures":[70],"digital":[72],"systems.":[73],"Encoding":[74],"schemes":[75,91],"provide":[76],"a":[77,128],"useful":[78],"way":[79],"interconnects":[86],"buses.":[88],"Realizing":[89],"these":[90],"require":[92],"use":[94],"encoders":[96],"decoders.":[98],"Our":[99,125],"proposed":[100,137],"reconfigured":[104,116],"implement":[106],"different":[107],"encoding":[108],"schemes.":[109],"Also,":[110],"same":[112],"function":[118],"either":[119],"as":[120,123],"encoder":[121],"or":[122],"decoder.":[124],"simulations":[126],"show":[127,154],"49.65%":[129],"reduction":[130],"dynamic":[132,163],"6-bit":[136],"reconfigurable":[138],"when":[140],"compared":[141],"with":[142],"CMOS-only":[143],"implementation.":[144],"Compared":[145],"CMOS":[148],"implementations,":[149],"RM-based":[151],"non-reconfigurable":[152],"designs":[153],"improvements":[155],"upto":[156],"1.8X":[157],"17.34X":[159],"leakage":[161],"respectively.":[165]},"counts_by_year":[{"year":2018,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
