{"id":"https://openalex.org/W2511754039","doi":"https://doi.org/10.1109/samos.2016.7818341","title":"Design productivity of a high level synthesis compiler versus HDL","display_name":"Design productivity of a high level synthesis compiler versus HDL","publication_year":2016,"publication_date":"2016-07-01","ids":{"openalex":"https://openalex.org/W2511754039","doi":"https://doi.org/10.1109/samos.2016.7818341","mag":"2511754039"},"language":"en","primary_location":{"id":"doi:10.1109/samos.2016.7818341","is_oa":false,"landing_page_url":"https://doi.org/10.1109/samos.2016.7818341","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS)","raw_type":"proceedings-article"},"type":"preprint","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://hal.science/hal-01358210","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5046104895","display_name":"Maxime Pelcat","orcid":"https://orcid.org/0000-0002-1158-0915"},"institutions":[{"id":"https://openalex.org/I28221208","display_name":"Institut National des Sciences Appliqu\u00e9es de Rennes","ror":"https://ror.org/04xaa4j22","country_code":"FR","type":"education","lineage":["https://openalex.org/I28221208"]},{"id":"https://openalex.org/I4210100151","display_name":"Institut d'\u00c9lectronique et des Technologies du num\u00e9Rique","ror":"https://ror.org/013q33h79","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I28221208","https://openalex.org/I4210095849","https://openalex.org/I4210100151","https://openalex.org/I56067802","https://openalex.org/I97188460"]},{"id":"https://openalex.org/I169645620","display_name":"Institut Pascal","ror":"https://ror.org/03vgfxd91","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I169645620","https://openalex.org/I198244214","https://openalex.org/I4210095849"]},{"id":"https://openalex.org/I4210099416","display_name":"Laboratoire d'Informatique, de Mod\u00e9lisation et d'Optimisation des Syst\u00e8mes","ror":"https://ror.org/00t3fpp34","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I198244214","https://openalex.org/I198244214","https://openalex.org/I203339264","https://openalex.org/I205703379","https://openalex.org/I3019848993","https://openalex.org/I4210099416","https://openalex.org/I4210123221","https://openalex.org/I4210159245","https://openalex.org/I4387154249"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"Maxime Pelcat","raw_affiliation_strings":["INSA Rennes, IETR, UBL, Rennes, France","Institut Pascal, Aubi\u00e8re, France"],"affiliations":[{"raw_affiliation_string":"INSA Rennes, IETR, UBL, Rennes, France","institution_ids":["https://openalex.org/I28221208","https://openalex.org/I4210100151"]},{"raw_affiliation_string":"Institut Pascal, Aubi\u00e8re, France","institution_ids":["https://openalex.org/I4210099416","https://openalex.org/I169645620"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035385650","display_name":"C\u00e9dric Bourrasset","orcid":null},"institutions":[{"id":"https://openalex.org/I170138621","display_name":"Atos (France)","ror":"https://ror.org/015w2wb33","country_code":"FR","type":"company","lineage":["https://openalex.org/I170138621"]},{"id":"https://openalex.org/I4210091683","display_name":"Centre Informatique National de l'Enseignement Sup\u00e9rieur","ror":"https://ror.org/00gnrwz95","country_code":"FR","type":"education","lineage":["https://openalex.org/I4210091683"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Cedric Bourrasset","raw_affiliation_strings":["Atos/Bull Center for Excellence in Parallel Programming, CINES, Montpellier, France"],"affiliations":[{"raw_affiliation_string":"Atos/Bull Center for Excellence in Parallel Programming, CINES, Montpellier, France","institution_ids":["https://openalex.org/I170138621","https://openalex.org/I4210091683"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5024138045","display_name":"Luca Maggiani","orcid":"https://orcid.org/0000-0002-9217-9911"},"institutions":[{"id":"https://openalex.org/I4210099416","display_name":"Laboratoire d'Informatique, de Mod\u00e9lisation et d'Optimisation des Syst\u00e8mes","ror":"https://ror.org/00t3fpp34","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I198244214","https://openalex.org/I198244214","https://openalex.org/I203339264","https://openalex.org/I205703379","https://openalex.org/I3019848993","https://openalex.org/I4210099416","https://openalex.org/I4210123221","https://openalex.org/I4210159245","https://openalex.org/I4387154249"]},{"id":"https://openalex.org/I169645620","display_name":"Institut Pascal","ror":"https://ror.org/03vgfxd91","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I169645620","https://openalex.org/I198244214","https://openalex.org/I4210095849"]},{"id":"https://openalex.org/I162290304","display_name":"Scuola Superiore Sant'Anna","ror":"https://ror.org/025602r80","country_code":"IT","type":"education","lineage":["https://openalex.org/I162290304"]}],"countries":["FR","IT"],"is_corresponding":false,"raw_author_name":"Luca Maggiani","raw_affiliation_strings":["Institut Pascal, Aubi\u00e8re, France","Scuola Superiore Sant' Anna, Pisa, Italy"],"affiliations":[{"raw_affiliation_string":"Institut Pascal, Aubi\u00e8re, France","institution_ids":["https://openalex.org/I4210099416","https://openalex.org/I169645620"]},{"raw_affiliation_string":"Scuola Superiore Sant' Anna, Pisa, Italy","institution_ids":["https://openalex.org/I162290304"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5104883678","display_name":"Fran\u00e7ois Berry","orcid":"https://orcid.org/0000-0002-5899-4672"},"institutions":[{"id":"https://openalex.org/I4210099416","display_name":"Laboratoire d'Informatique, de Mod\u00e9lisation et d'Optimisation des Syst\u00e8mes","ror":"https://ror.org/00t3fpp34","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I198244214","https://openalex.org/I198244214","https://openalex.org/I203339264","https://openalex.org/I205703379","https://openalex.org/I3019848993","https://openalex.org/I4210099416","https://openalex.org/I4210123221","https://openalex.org/I4210159245","https://openalex.org/I4387154249"]},{"id":"https://openalex.org/I169645620","display_name":"Institut Pascal","ror":"https://ror.org/03vgfxd91","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I169645620","https://openalex.org/I198244214","https://openalex.org/I4210095849"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Francois Berry","raw_affiliation_strings":["Institut Pascal, Aubi\u00e8re, France"],"affiliations":[{"raw_affiliation_string":"Institut Pascal, Aubi\u00e8re, France","institution_ids":["https://openalex.org/I4210099416","https://openalex.org/I169645620"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5046104895"],"corresponding_institution_ids":["https://openalex.org/I169645620","https://openalex.org/I28221208","https://openalex.org/I4210099416","https://openalex.org/I4210100151"],"apc_list":null,"apc_paid":null,"fwci":1.2867,"has_fulltext":false,"cited_by_count":32,"citation_normalized_percentile":{"value":0.79121081,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"140","last_page":"147"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.806685209274292},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.7406107783317566},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.7317452430725098},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7132445573806763},{"id":"https://openalex.org/keywords/productivity","display_name":"Productivity","score":0.6656597852706909},{"id":"https://openalex.org/keywords/hardware-description-language","display_name":"Hardware description language","score":0.6086642742156982},{"id":"https://openalex.org/keywords/metric","display_name":"Metric (unit)","score":0.41956108808517456},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3445330262184143},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.27473145723342896},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.24249053001403809},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.2293851673603058},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.0943371057510376},{"id":"https://openalex.org/keywords/operations-management","display_name":"Operations management","score":0.07406345009803772}],"concepts":[{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.806685209274292},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.7406107783317566},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.7317452430725098},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7132445573806763},{"id":"https://openalex.org/C204983608","wikidata":"https://www.wikidata.org/wiki/Q2111958","display_name":"Productivity","level":2,"score":0.6656597852706909},{"id":"https://openalex.org/C42143788","wikidata":"https://www.wikidata.org/wiki/Q173341","display_name":"Hardware description language","level":3,"score":0.6086642742156982},{"id":"https://openalex.org/C176217482","wikidata":"https://www.wikidata.org/wiki/Q860554","display_name":"Metric (unit)","level":2,"score":0.41956108808517456},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3445330262184143},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.27473145723342896},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.24249053001403809},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.2293851673603058},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0943371057510376},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.07406345009803772},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/samos.2016.7818341","is_oa":false,"landing_page_url":"https://doi.org/10.1109/samos.2016.7818341","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS)","raw_type":"proceedings-article"},{"id":"pmh:oai:HAL:hal-01358210v1","is_oa":true,"landing_page_url":"https://hal.science/hal-01358210","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS 2016), Jul 2016, Agios Konstantinos, SAMOS, Greece. &#x27E8;10.1109/SAMOS.2016.7818341&#x27E9;","raw_type":"Conference papers"}],"best_oa_location":{"id":"pmh:oai:HAL:hal-01358210v1","is_oa":true,"landing_page_url":"https://hal.science/hal-01358210","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS 2016), Jul 2016, Agios Konstantinos, SAMOS, Greece. &#x27E8;10.1109/SAMOS.2016.7818341&#x27E9;","raw_type":"Conference papers"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/8","display_name":"Decent work and economic growth","score":0.5799999833106995}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W68880992","https://openalex.org/W200320269","https://openalex.org/W202631676","https://openalex.org/W791858813","https://openalex.org/W1486006109","https://openalex.org/W1496611515","https://openalex.org/W1547827494","https://openalex.org/W2048947019","https://openalex.org/W2094998159","https://openalex.org/W2095761111","https://openalex.org/W2121075990","https://openalex.org/W2127044011","https://openalex.org/W2146395539","https://openalex.org/W2166029537","https://openalex.org/W4285719527","https://openalex.org/W4392429789","https://openalex.org/W6608326232","https://openalex.org/W6622833244","https://openalex.org/W6629705995","https://openalex.org/W6632856477","https://openalex.org/W6862200966"],"related_works":["https://openalex.org/W2110818533","https://openalex.org/W1917852300","https://openalex.org/W2384838054","https://openalex.org/W2139058049","https://openalex.org/W2548456620","https://openalex.org/W2075214143","https://openalex.org/W1843355381","https://openalex.org/W1492116303","https://openalex.org/W2069295582","https://openalex.org/W2077870657"],"abstract_inverted_index":{"The":[0,62,76,121],"complexity":[1],"of":[2,12,35,51,89,133,150,170,178],"hardware":[3,60],"systems":[4],"is":[5,19,38,78,115,154],"currently":[6],"growing":[7],"faster":[8],"than":[9,128],"the":[10,33,48,68,102,112,134,139,157],"productivity":[11,148],"system":[13],"designers":[14],"and":[15,24,73,145,172],"programmers.":[16],"This":[17],"phenomenon":[18],"called":[20],"Design":[21,36,49,64,98,103],"Productivity":[22,37,50,65,104],"Gap":[23],"results":[25,162],"in":[26,97,152,167,176],"inflating":[27],"design":[28,71,147,168],"costs.":[29],"In":[30],"this":[31],"paper,":[32],"notion":[34],"precisely":[39],"defined,":[40],"as":[41,43],"well":[42],"a":[44,52,58,146],"metric":[45,66],"to":[46,81,117],"assess":[47],"High-Level":[53],"Synthesis":[54],"(HLS)":[55],"method":[56,77],"versus":[57],"manual":[59,118],"description.":[61],"proposed":[63],"evaluates":[67],"trade-off":[69],"between":[70],"efficiency":[72],"implementation":[74],"quality.":[75],"generic":[79],"enough":[80],"be":[82],"used":[83],"for":[84,94,156],"comparing":[85],"several":[86],"HLS":[87,108,159],"methods":[88],"different":[90],"natures,":[91],"opening":[92],"opportunities":[93],"further":[95],"progress":[96],"Productivity.":[99],"To":[100],"demonstrate":[101],"evaluation":[105],"method,":[106],"an":[107,164,173],"compiler":[109],"based":[110],"on":[111],"CAPH":[113,129,158],"language":[114],"compared":[116],"VHDL":[119,125],"writing.":[120],"causes":[122],"that":[123],"make":[124],"lower":[126],"level":[127],"are":[130,143],"discussed.":[131],"Versions":[132],"sub-pixel":[135],"interpolation":[136],"filter":[137],"from":[138,163],"MPEG":[140],"HEVC":[141],"standard":[142],"implemented":[144],"gain":[149,166],"2.3\u00d7":[151],"average":[153,165,174],"measured":[155],"method.":[160],"It":[161],"time":[169],"4.4\u00d7":[171],"loss":[175],"quality":[177],"1.9\u00d7.":[179]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":4},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":6},{"year":2021,"cited_by_count":7},{"year":2020,"cited_by_count":7},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":1}],"updated_date":"2026-03-10T16:38:18.471706","created_date":"2025-10-10T00:00:00"}
