{"id":"https://openalex.org/W2210220439","doi":"https://doi.org/10.1109/samos.2015.7363698","title":"ESL power estimation using virtual platforms with black box processor models","display_name":"ESL power estimation using virtual platforms with black box processor models","publication_year":2015,"publication_date":"2015-07-01","ids":{"openalex":"https://openalex.org/W2210220439","doi":"https://doi.org/10.1109/samos.2015.7363698","mag":"2210220439"},"language":"en","primary_location":{"id":"doi:10.1109/samos.2015.7363698","is_oa":false,"landing_page_url":"https://doi.org/10.1109/samos.2015.7363698","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5061185126","display_name":"Stefan Sch\u00fcrmans","orcid":null},"institutions":[{"id":"https://openalex.org/I887968799","display_name":"RWTH Aachen University","ror":"https://ror.org/04xfq0f34","country_code":"DE","type":"education","lineage":["https://openalex.org/I887968799"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Stefan Schurmans","raw_affiliation_strings":["Institute for Communication Technologies and Embedded Systems, RWTH Aachen University, Germany"],"affiliations":[{"raw_affiliation_string":"Institute for Communication Technologies and Embedded Systems, RWTH Aachen University, Germany","institution_ids":["https://openalex.org/I887968799"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051885547","display_name":"Gereon Onnebrink","orcid":"https://orcid.org/0000-0003-1321-8458"},"institutions":[{"id":"https://openalex.org/I887968799","display_name":"RWTH Aachen University","ror":"https://ror.org/04xfq0f34","country_code":"DE","type":"education","lineage":["https://openalex.org/I887968799"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Gereon Onnebrink","raw_affiliation_strings":["Institute for Communication Technologies and Embedded Systems, RWTH Aachen University, Germany"],"affiliations":[{"raw_affiliation_string":"Institute for Communication Technologies and Embedded Systems, RWTH Aachen University, Germany","institution_ids":["https://openalex.org/I887968799"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023470562","display_name":"Rainer Leupers","orcid":"https://orcid.org/0000-0002-6735-3033"},"institutions":[{"id":"https://openalex.org/I887968799","display_name":"RWTH Aachen University","ror":"https://ror.org/04xfq0f34","country_code":"DE","type":"education","lineage":["https://openalex.org/I887968799"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Rainer Leupers","raw_affiliation_strings":["Institute for Communication Technologies and Embedded Systems, RWTH Aachen University, Germany"],"affiliations":[{"raw_affiliation_string":"Institute for Communication Technologies and Embedded Systems, RWTH Aachen University, Germany","institution_ids":["https://openalex.org/I887968799"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050903837","display_name":"Gerd Ascheid","orcid":"https://orcid.org/0000-0003-4068-3558"},"institutions":[{"id":"https://openalex.org/I887968799","display_name":"RWTH Aachen University","ror":"https://ror.org/04xfq0f34","country_code":"DE","type":"education","lineage":["https://openalex.org/I887968799"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Gerd Ascheid","raw_affiliation_strings":["Institute for Communication Technologies and Embedded Systems, RWTH Aachen University, Germany"],"affiliations":[{"raw_affiliation_string":"Institute for Communication Technologies and Embedded Systems, RWTH Aachen University, Germany","institution_ids":["https://openalex.org/I887968799"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5029893265","display_name":"Xiaotao Chen","orcid":"https://orcid.org/0000-0003-4077-5364"},"institutions":[{"id":"https://openalex.org/I4210146936","display_name":"Huawei Technologies (United States)","ror":"https://ror.org/03jyqk712","country_code":"US","type":"company","lineage":["https://openalex.org/I2250955327","https://openalex.org/I4210146936"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Xiaotao Chen","raw_affiliation_strings":["Huawei Technologies Co., Ltd., Bridgewater, NJ, USA"],"affiliations":[{"raw_affiliation_string":"Huawei Technologies Co., Ltd., Bridgewater, NJ, USA","institution_ids":["https://openalex.org/I4210146936"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5061185126"],"corresponding_institution_ids":["https://openalex.org/I887968799"],"apc_list":null,"apc_paid":null,"fwci":2.9687,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.91286271,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"354","last_page":"359"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9968000054359436,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7666882276535034},{"id":"https://openalex.org/keywords/black-box","display_name":"Black box","score":0.7088741064071655},{"id":"https://openalex.org/keywords/electronic-system-level-design-and-verification","display_name":"Electronic system-level design and verification","score":0.6173750162124634},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5577335357666016},{"id":"https://openalex.org/keywords/code","display_name":"Code (set theory)","score":0.54731684923172},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5262897610664368},{"id":"https://openalex.org/keywords/estimation","display_name":"Estimation","score":0.5133292078971863},{"id":"https://openalex.org/keywords/binary-number","display_name":"Binary number","score":0.5014221668243408},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.4898166358470917},{"id":"https://openalex.org/keywords/arm-architecture","display_name":"ARM architecture","score":0.4202638268470764},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4155122637748718},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.3997464179992676},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3254881203174591},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.13720959424972534},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12604036927223206},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.12380185723304749},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09430915117263794}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7666882276535034},{"id":"https://openalex.org/C94966114","wikidata":"https://www.wikidata.org/wiki/Q29256","display_name":"Black box","level":2,"score":0.7088741064071655},{"id":"https://openalex.org/C77495112","wikidata":"https://www.wikidata.org/wiki/Q5358436","display_name":"Electronic system-level design and verification","level":2,"score":0.6173750162124634},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5577335357666016},{"id":"https://openalex.org/C2776760102","wikidata":"https://www.wikidata.org/wiki/Q5139990","display_name":"Code (set theory)","level":3,"score":0.54731684923172},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5262897610664368},{"id":"https://openalex.org/C96250715","wikidata":"https://www.wikidata.org/wiki/Q965330","display_name":"Estimation","level":2,"score":0.5133292078971863},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.5014221668243408},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.4898166358470917},{"id":"https://openalex.org/C26771161","wikidata":"https://www.wikidata.org/wiki/Q16980","display_name":"ARM architecture","level":2,"score":0.4202638268470764},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4155122637748718},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3997464179992676},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3254881203174591},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.13720959424972534},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12604036927223206},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.12380185723304749},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09430915117263794},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.0},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.0},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/samos.2015.7363698","is_oa":false,"landing_page_url":"https://doi.org/10.1109/samos.2015.7363698","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)","raw_type":"proceedings-article"},{"id":"pmh:oai:publications.rwth-aachen.de:565659","is_oa":false,"landing_page_url":"https://publications.rwth-aachen.de/record/565659","pdf_url":null,"source":{"id":"https://openalex.org/S4306401362","display_name":"RWTH Publications (RWTH Aachen)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I887968799","host_organization_name":"RWTH Aachen University","host_organization_lineage":["https://openalex.org/I887968799"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XV) : July 20-23, 2015, Samos, Greece : proceedings / editors: Dimitrios Soudris and Luigi Carro<br/>2015 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS XV, Samos, Greece, 2015-07-20 - 2015-07-23","raw_type":"info:eu-repo/semantics/publishedVersion"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":26,"referenced_works":["https://openalex.org/W1568192366","https://openalex.org/W1686420892","https://openalex.org/W1965502372","https://openalex.org/W1969423394","https://openalex.org/W1995295065","https://openalex.org/W2004340162","https://openalex.org/W2042678339","https://openalex.org/W2055713419","https://openalex.org/W2057709435","https://openalex.org/W2075962313","https://openalex.org/W2100076905","https://openalex.org/W2102727118","https://openalex.org/W2118954319","https://openalex.org/W2125829254","https://openalex.org/W2131756830","https://openalex.org/W2132074508","https://openalex.org/W2137262315","https://openalex.org/W2144293278","https://openalex.org/W2148037367","https://openalex.org/W3139709947","https://openalex.org/W3140903683","https://openalex.org/W4205733018","https://openalex.org/W4232751114","https://openalex.org/W4251095810","https://openalex.org/W4311791248","https://openalex.org/W6792941224"],"related_works":["https://openalex.org/W2065289416","https://openalex.org/W2912613323","https://openalex.org/W2017236304","https://openalex.org/W2136854845","https://openalex.org/W2132074508","https://openalex.org/W2126751824","https://openalex.org/W2119788505","https://openalex.org/W3005810125","https://openalex.org/W2014732571","https://openalex.org/W2059569687"],"abstract_inverted_index":{"Processor":[0],"models":[1],"for":[2,53,62],"electronic":[3],"system":[4],"level":[5],"(ESL)":[6],"simulations":[7],"are":[8],"usually":[9],"provided":[10],"by":[11],"their":[12,30],"vendors":[13],"as":[14,21],"binary":[15],"object":[16],"code.":[17],"Those":[18],"binaries":[19],"appear":[20],"black":[22,57],"boxes,":[23],"which":[24],"do":[25],"not":[26],"allow":[27],"to":[28,74,81],"observe":[29],"internals.":[31],"This":[32],"prevents":[33],"the":[34,54,63,69,87,91,93],"application":[35],"of":[36,56],"most":[37],"existing":[38],"ESL":[39,94],"power":[40,83],"estimation":[41,51,95],"methodologies.":[42],"To":[43],"remedy":[44],"this":[45,47],"situation,":[46],"work":[48],"presents":[49],"an":[50],"methodology":[52],"case":[55],"box":[58],"models.":[59],"The":[60],"evaluation":[61],"ARM":[64],"Cortex-A9":[65],"processor":[66],"shows":[67],"that":[68],"proposed":[70],"approach":[71],"is":[72,97],"able":[73],"achieve":[75],"a":[76],"high":[77],"accuracy.":[78],"In":[79],"comparison":[80],"hardware":[82],"measurements":[84],"obtained":[85],"from":[86],"OMAP4460":[88],"chip":[89],"on":[90],"PandaBoard,":[92],"error":[96],"below":[98],"5%.":[99]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":5}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}
