{"id":"https://openalex.org/W2206074545","doi":"https://doi.org/10.1109/samos.2015.7363663","title":"FNOCEE: A framework for NoC evaluation by FPGA-based emulation","display_name":"FNOCEE: A framework for NoC evaluation by FPGA-based emulation","publication_year":2015,"publication_date":"2015-07-01","ids":{"openalex":"https://openalex.org/W2206074545","doi":"https://doi.org/10.1109/samos.2015.7363663","mag":"2206074545"},"language":"en","primary_location":{"id":"doi:10.1109/samos.2015.7363663","is_oa":false,"landing_page_url":"https://doi.org/10.1109/samos.2015.7363663","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5041568016","display_name":"Daniel Pfefferkorn","orcid":null},"institutions":[{"id":"https://openalex.org/I114112103","display_name":"Leibniz University Hannover","ror":"https://ror.org/0304hq317","country_code":"DE","type":"education","lineage":["https://openalex.org/I114112103"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Daniel Pfefferkorn","raw_affiliation_strings":["Institute of Microelectronic Systems, Leibniz Universit\u00e4t Hannover, Hannover, Germany"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronic Systems, Leibniz Universit\u00e4t Hannover, Hannover, Germany","institution_ids":["https://openalex.org/I114112103"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019709224","display_name":"Achim Schmider","orcid":null},"institutions":[{"id":"https://openalex.org/I114112103","display_name":"Leibniz University Hannover","ror":"https://ror.org/0304hq317","country_code":"DE","type":"education","lineage":["https://openalex.org/I114112103"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Achim Schmider","raw_affiliation_strings":["Institute of Microelectronic Systems, Leibniz Universit\u00e4t Hannover, Hannover, Germany"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronic Systems, Leibniz Universit\u00e4t Hannover, Hannover, Germany","institution_ids":["https://openalex.org/I114112103"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5038123706","display_name":"Guillermo Pay\u00e1\u2013Vay\u00e1","orcid":"https://orcid.org/0000-0003-3503-8386"},"institutions":[{"id":"https://openalex.org/I114112103","display_name":"Leibniz University Hannover","ror":"https://ror.org/0304hq317","country_code":"DE","type":"education","lineage":["https://openalex.org/I114112103"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Guillermo Paya-Vaya","raw_affiliation_strings":["Institute of Microelectronic Systems, Leibniz Universit\u00e4t Hannover, Hannover, Germany"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronic Systems, Leibniz Universit\u00e4t Hannover, Hannover, Germany","institution_ids":["https://openalex.org/I114112103"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5038137313","display_name":"Martin Neuenhahn","orcid":null},"institutions":[{"id":"https://openalex.org/I114112103","display_name":"Leibniz University Hannover","ror":"https://ror.org/0304hq317","country_code":"DE","type":"education","lineage":["https://openalex.org/I114112103"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Martin Neuenhahn","raw_affiliation_strings":["Institute of Microelectronic Systems, Leibniz Universit\u00e4t Hannover, Hannover, Germany"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronic Systems, Leibniz Universit\u00e4t Hannover, Hannover, Germany","institution_ids":["https://openalex.org/I114112103"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016532646","display_name":"Holger Blume","orcid":"https://orcid.org/0000-0002-0640-6875"},"institutions":[{"id":"https://openalex.org/I114112103","display_name":"Leibniz University Hannover","ror":"https://ror.org/0304hq317","country_code":"DE","type":"education","lineage":["https://openalex.org/I114112103"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Holger Blume","raw_affiliation_strings":["Institute of Microelectronic Systems, Leibniz Universit\u00e4t Hannover, Hannover, Germany"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronic Systems, Leibniz Universit\u00e4t Hannover, Hannover, Germany","institution_ids":["https://openalex.org/I114112103"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5041568016"],"corresponding_institution_ids":["https://openalex.org/I114112103"],"apc_list":null,"apc_paid":null,"fwci":0.3328,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.6652119,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"8","issue":null,"first_page":"86","last_page":"95"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/emulation","display_name":"Emulation","score":0.9078748822212219},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7871881127357483},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7645803689956665},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.7545846700668335},{"id":"https://openalex.org/keywords/task","display_name":"Task (project management)","score":0.5876320600509644},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.5091580748558044},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.48237958550453186},{"id":"https://openalex.org/keywords/genetic-algorithm","display_name":"Genetic algorithm","score":0.4456518292427063},{"id":"https://openalex.org/keywords/graph","display_name":"Graph","score":0.4196809232234955},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.39237549901008606},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.38177695870399475},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3801421523094177},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.19446983933448792},{"id":"https://openalex.org/keywords/machine-learning","display_name":"Machine learning","score":0.10834723711013794},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.08678430318832397},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.07849925756454468}],"concepts":[{"id":"https://openalex.org/C149810388","wikidata":"https://www.wikidata.org/wiki/Q5374873","display_name":"Emulation","level":2,"score":0.9078748822212219},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7871881127357483},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7645803689956665},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.7545846700668335},{"id":"https://openalex.org/C2780451532","wikidata":"https://www.wikidata.org/wiki/Q759676","display_name":"Task (project management)","level":2,"score":0.5876320600509644},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.5091580748558044},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.48237958550453186},{"id":"https://openalex.org/C8880873","wikidata":"https://www.wikidata.org/wiki/Q187787","display_name":"Genetic algorithm","level":2,"score":0.4456518292427063},{"id":"https://openalex.org/C132525143","wikidata":"https://www.wikidata.org/wiki/Q141488","display_name":"Graph","level":2,"score":0.4196809232234955},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.39237549901008606},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.38177695870399475},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3801421523094177},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.19446983933448792},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.10834723711013794},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.08678430318832397},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.07849925756454468},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.0},{"id":"https://openalex.org/C50522688","wikidata":"https://www.wikidata.org/wiki/Q189833","display_name":"Economic growth","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/samos.2015.7363663","is_oa":false,"landing_page_url":"https://doi.org/10.1109/samos.2015.7363663","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":32,"referenced_works":["https://openalex.org/W98859305","https://openalex.org/W138826728","https://openalex.org/W194480874","https://openalex.org/W1702595188","https://openalex.org/W1978559775","https://openalex.org/W1979166756","https://openalex.org/W1985219194","https://openalex.org/W2004236625","https://openalex.org/W2027197113","https://openalex.org/W2040466547","https://openalex.org/W2079942837","https://openalex.org/W2089155985","https://openalex.org/W2123905442","https://openalex.org/W2125357468","https://openalex.org/W2129233376","https://openalex.org/W2131960077","https://openalex.org/W2136206748","https://openalex.org/W2139653418","https://openalex.org/W2140894580","https://openalex.org/W2141235369","https://openalex.org/W2150871235","https://openalex.org/W2151567555","https://openalex.org/W2156360978","https://openalex.org/W2160642395","https://openalex.org/W2723583030","https://openalex.org/W2807270730","https://openalex.org/W4236129841","https://openalex.org/W4285719527","https://openalex.org/W6637371607","https://openalex.org/W6678665702","https://openalex.org/W6679831534","https://openalex.org/W6818116350"],"related_works":["https://openalex.org/W2154523322","https://openalex.org/W2122279357","https://openalex.org/W1967938402","https://openalex.org/W2386041993","https://openalex.org/W1608572506","https://openalex.org/W4863605","https://openalex.org/W4285287318","https://openalex.org/W2784141701","https://openalex.org/W2138821532","https://openalex.org/W1978899622"],"abstract_inverted_index":{"This":[0],"paper":[1],"introduces":[2],"FNOCEE,":[3],"a":[4,18,26,98],"framework":[5],"for":[6],"the":[7,37,64,84,93],"evaluation":[8],"of":[9,52,57,75,88,100],"NoC-based":[10],"many-cores":[11],"systems":[12],"by":[13],"FPGA-based":[14],"emulation.":[15],"It":[16],"uses":[17],"task":[19,38],"graph-oriented":[20],"approach":[21],"to":[22,32,36,62,83],"model":[23],"applications,":[24],"while":[25],"hardware-accelerated":[27],"genetic":[28,43],"algorithm":[29,44],"is":[30,45,79],"employed":[31],"find":[33],"close-to-optimal":[34],"solutions":[35],"mapping":[39],"problem.":[40],"The":[41],"proposed":[42],"analyzed":[46],"in":[47,50],"detail,":[48],"e.g.,":[49],"terms":[51],"mutation":[53],"rate":[54],"and":[55,86,92],"number":[56,85],"elite":[58],"individuals.":[59],"In":[60],"order":[61],"illustrate":[63],"framework's":[65],"capabilities,":[66],"several":[67],"case":[68],"studies":[69],"have":[70],"been":[71],"performed,":[72],"wherein":[73],"scalability":[74],"relevant":[76],"parallel":[77],"applications":[78],"investigated":[80],"with":[81],"regard":[82],"type":[87],"available":[89],"processing":[90],"cores":[91],"generated":[94],"traffic":[95],"load":[96],"as":[97],"result":[99],"inter-task":[101],"communication.":[102]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2017,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}