{"id":"https://openalex.org/W2020775548","doi":"https://doi.org/10.1109/samos.2014.6893197","title":"A run-time modulo scheduling by using a binary translation mechanism","display_name":"A run-time modulo scheduling by using a binary translation mechanism","publication_year":2014,"publication_date":"2014-07-01","ids":{"openalex":"https://openalex.org/W2020775548","doi":"https://doi.org/10.1109/samos.2014.6893197","mag":"2020775548"},"language":"en","primary_location":{"id":"doi:10.1109/samos.2014.6893197","is_oa":false,"landing_page_url":"https://doi.org/10.1109/samos.2014.6893197","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5016370549","display_name":"Ricardo Ferreira","orcid":"https://orcid.org/0000-0003-1802-7829"},"institutions":[{"id":"https://openalex.org/I146165071","display_name":"Universidade Federal de Vi\u00e7osa","ror":"https://ror.org/0409dgb37","country_code":"BR","type":"education","lineage":["https://openalex.org/I146165071"]}],"countries":["BR"],"is_corresponding":true,"raw_author_name":"Ricardo Ferreira","raw_affiliation_strings":["Departamento Informatica, UFV, Vicosa, Brazil"],"affiliations":[{"raw_affiliation_string":"Departamento Informatica, UFV, Vicosa, Brazil","institution_ids":["https://openalex.org/I146165071"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027756766","display_name":"Waldir Denver","orcid":null},"institutions":[{"id":"https://openalex.org/I146165071","display_name":"Universidade Federal de Vi\u00e7osa","ror":"https://ror.org/0409dgb37","country_code":"BR","type":"education","lineage":["https://openalex.org/I146165071"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Waldir Denver","raw_affiliation_strings":["Departamento Informatica, UFV, Vicosa, Brazil"],"affiliations":[{"raw_affiliation_string":"Departamento Informatica, UFV, Vicosa, Brazil","institution_ids":["https://openalex.org/I146165071"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103034522","display_name":"Monica Pereira","orcid":"https://orcid.org/0000-0002-6580-1250"},"institutions":[{"id":"https://openalex.org/I35046152","display_name":"Universidade Federal do Rio Grande do Norte","ror":"https://ror.org/04wn09761","country_code":"BR","type":"education","lineage":["https://openalex.org/I35046152"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Monica Pereira","raw_affiliation_strings":["Departamento de Informatica e Matematica Aplicada, UFRN, Natal, RN, Brazil","Departamento de Informatica e Matematica Aplicada, UFRN, Natal/RN, Brazil"],"affiliations":[{"raw_affiliation_string":"Departamento de Informatica e Matematica Aplicada, UFRN, Natal, RN, Brazil","institution_ids":["https://openalex.org/I35046152"]},{"raw_affiliation_string":"Departamento de Informatica e Matematica Aplicada, UFRN, Natal/RN, Brazil","institution_ids":["https://openalex.org/I35046152"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5046401338","display_name":"Jorge Quadros","orcid":null},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Jorge Quadros","raw_affiliation_strings":["Instituto de Informatica, UFRGS, Porto Alegre, Brazil","Instituto de Inform\u00e1tica \u2013 UFRGS, Porto Alegre, Brazil#TAB#"],"affiliations":[{"raw_affiliation_string":"Instituto de Informatica, UFRGS, Porto Alegre, Brazil","institution_ids":["https://openalex.org/I130442723"]},{"raw_affiliation_string":"Instituto de Inform\u00e1tica \u2013 UFRGS, Porto Alegre, Brazil#TAB#","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5062358729","display_name":"Luigi Carro","orcid":"https://orcid.org/0000-0002-7402-4780"},"institutions":[{"id":"https://openalex.org/I130442723","display_name":"Universidade Federal do Rio Grande do Sul","ror":"https://ror.org/041yk2d64","country_code":"BR","type":"education","lineage":["https://openalex.org/I130442723"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Luigi Carro","raw_affiliation_strings":["Instituto de Informatica, UFRGS, Porto Alegre, Brazil","Instituto de Inform\u00e1tica \u2013 UFRGS, Porto Alegre, Brazil#TAB#"],"affiliations":[{"raw_affiliation_string":"Instituto de Informatica, UFRGS, Porto Alegre, Brazil","institution_ids":["https://openalex.org/I130442723"]},{"raw_affiliation_string":"Instituto de Inform\u00e1tica \u2013 UFRGS, Porto Alegre, Brazil#TAB#","institution_ids":["https://openalex.org/I130442723"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5036463224","display_name":"Stephan Wong","orcid":"https://orcid.org/0000-0003-3521-2612"},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Stephan Wong","raw_affiliation_strings":["Computer Engineering Lab, TU Delft, Delft, Netherlands","Computer Engineering Lab., TU Delft, Netherlands"],"affiliations":[{"raw_affiliation_string":"Computer Engineering Lab, TU Delft, Delft, Netherlands","institution_ids":["https://openalex.org/I98358874"]},{"raw_affiliation_string":"Computer Engineering Lab., TU Delft, Netherlands","institution_ids":["https://openalex.org/I98358874"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5016370549"],"corresponding_institution_ids":["https://openalex.org/I146165071"],"apc_list":null,"apc_paid":null,"fwci":1.2259,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.78694341,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"38","issue":null,"first_page":"75","last_page":"82"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8932059407234192},{"id":"https://openalex.org/keywords/very-long-instruction-word","display_name":"Very long instruction word","score":0.8425549864768982},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6968797445297241},{"id":"https://openalex.org/keywords/software-pipelining","display_name":"Software pipelining","score":0.6923791766166687},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.6115462183952332},{"id":"https://openalex.org/keywords/binary-translation","display_name":"Binary translation","score":0.5948160886764526},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.5578276515007019},{"id":"https://openalex.org/keywords/code-generation","display_name":"Code generation","score":0.49889516830444336},{"id":"https://openalex.org/keywords/compile-time","display_name":"Compile time","score":0.47944727540016174},{"id":"https://openalex.org/keywords/modulo","display_name":"Modulo","score":0.4290015697479248},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.42588526010513306},{"id":"https://openalex.org/keywords/loop-tiling","display_name":"Loop tiling","score":0.4197348356246948},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.2744491696357727},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.1930333971977234},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.18337088823318481},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.13219857215881348}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8932059407234192},{"id":"https://openalex.org/C170595534","wikidata":"https://www.wikidata.org/wiki/Q249743","display_name":"Very long instruction word","level":2,"score":0.8425549864768982},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6968797445297241},{"id":"https://openalex.org/C188854837","wikidata":"https://www.wikidata.org/wiki/Q268469","display_name":"Software pipelining","level":3,"score":0.6923791766166687},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.6115462183952332},{"id":"https://openalex.org/C2778971978","wikidata":"https://www.wikidata.org/wiki/Q2287075","display_name":"Binary translation","level":3,"score":0.5948160886764526},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.5578276515007019},{"id":"https://openalex.org/C133162039","wikidata":"https://www.wikidata.org/wiki/Q1061077","display_name":"Code generation","level":3,"score":0.49889516830444336},{"id":"https://openalex.org/C200833197","wikidata":"https://www.wikidata.org/wiki/Q333707","display_name":"Compile time","level":3,"score":0.47944727540016174},{"id":"https://openalex.org/C54732982","wikidata":"https://www.wikidata.org/wiki/Q1415345","display_name":"Modulo","level":2,"score":0.4290015697479248},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.42588526010513306},{"id":"https://openalex.org/C11799548","wikidata":"https://www.wikidata.org/wiki/Q6675847","display_name":"Loop tiling","level":3,"score":0.4197348356246948},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.2744491696357727},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.1930333971977234},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.18337088823318481},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.13219857215881348},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/samos.2014.6893197","is_oa":false,"landing_page_url":"https://doi.org/10.1109/samos.2014.6893197","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":26,"referenced_works":["https://openalex.org/W201652765","https://openalex.org/W1502361557","https://openalex.org/W1964191474","https://openalex.org/W1969837230","https://openalex.org/W1974887540","https://openalex.org/W2002106209","https://openalex.org/W2023027709","https://openalex.org/W2032467148","https://openalex.org/W2067153723","https://openalex.org/W2071829400","https://openalex.org/W2081619861","https://openalex.org/W2112495948","https://openalex.org/W2116304229","https://openalex.org/W2117209052","https://openalex.org/W2122171990","https://openalex.org/W2123412205","https://openalex.org/W2139817798","https://openalex.org/W2153402554","https://openalex.org/W2156458114","https://openalex.org/W2158664566","https://openalex.org/W2171066426","https://openalex.org/W3148466761","https://openalex.org/W4250523893","https://openalex.org/W4252370083","https://openalex.org/W6630154184","https://openalex.org/W6668719437"],"related_works":["https://openalex.org/W2303048830","https://openalex.org/W2124831322","https://openalex.org/W4232953398","https://openalex.org/W4232919122","https://openalex.org/W2510534818","https://openalex.org/W1990058210","https://openalex.org/W3143608323","https://openalex.org/W2115270696","https://openalex.org/W1575892654","https://openalex.org/W2168702624"],"abstract_inverted_index":{"It":[0],"is":[1,19,168],"well":[2],"known":[3],"that":[4,69,161,209],"innermost":[5],"loop":[6,130],"optimizations":[7],"have":[8],"a":[9,78,98,120,155,179,215],"big":[10],"effect":[11],"on":[12,77,154],"the":[13,36,59,65,101,123,149,172,200,210],"total":[14],"execution":[15],"time.":[16,53],"Although":[17],"CGRAs":[18],"widely":[20],"used":[21],"for":[22,64,128,225],"this":[23,55],"type":[24],"of":[25,94,96,193],"optimizations,":[26],"their":[27],"usage":[28],"at":[29],"run-time":[30,211],"has":[31,104,132],"been":[32,105,133],"limited":[33],"due":[34],"to":[35,75,113,122,144,199],"overheads":[37],"introduced":[38],"by":[39,135],"application":[40],"analysis,":[41],"code":[42,73],"transformation,":[43],"and":[44,138,147,175,195,202],"reconfiguration.":[45],"These":[46],"steps":[47],"are":[48],"normally":[49],"performed":[50],"during":[51],"compile":[52],"In":[54,185],"work,":[56],"we":[57],"present":[58],"first":[60],"dynamic":[61],"translation":[62],"technique":[63],"modulo":[66],"scheduling":[67],"approach":[68,224],"can":[70,213],"convert":[71],"binary":[72],"on-the-fly":[74],"run":[76],"CGRA.":[79],"The":[80,157],"proposed":[81,150],"mechanism":[82],"ensures":[83],"software":[84],"compatibility":[85],"as":[86,140],"it":[87,187],"supports":[88],"different":[89],"source":[90],"ISAs.":[91],"As":[92],"proof":[93],"concept":[95],"scaling,":[97],"change":[99],"in":[100,197],"memory":[102,109,115],"bandwidth":[103],"evaluated":[106],"(from":[107],"one":[108],"access":[110],"per":[111,117],"cycle":[112],"two":[114],"accesses":[116],"cycle).":[118],"Moreover,":[119],"comparison":[121,198],"state-of-the-art":[124],"static":[125],"compiler-based":[126],"approaches":[127],"inner":[129],"accelerators":[131],"done":[134],"using":[136],"CGRA":[137,151,163],"VLIW":[139,173,180,228],"target":[141],"architectures.":[142],"Additionally,":[143],"measure":[145],"area":[146,158],"performance,":[148],"was":[152],"prototyped":[153],"FPGA.":[156],"comparisons":[159],"show":[160],"crossbar":[162],"(with":[164],"16":[165],"processing":[166],"elements)":[167],"1.9x":[169],"larger":[170],"than":[171,178,220],"4-issue":[174],"1.3x":[176],"smaller":[177],"8-issue":[181],"softcore":[182],"processor,":[183],"respectively.":[184,204],"addition,":[186],"reaches":[188],"an":[189,221,226],"overall":[190],"speedup":[191],"factor":[192],"2.17x":[194],"2.0x":[196],"4":[201],"8-issue,":[203],"Our":[205],"results":[206],"also":[207],"demonstrate":[208],"algorithm":[212],"reach":[214],"near-optimal":[216],"ILP":[217],"rate,":[218],"better":[219],"off-line":[222],"compiler":[223],"n-issue":[227],"processor.":[229]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":2},{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
