{"id":"https://openalex.org/W2080033667","doi":"https://doi.org/10.1109/samos.2014.6893188","title":"Co-design of many-accelerator heterogeneous systems exploiting virtual platforms","display_name":"Co-design of many-accelerator heterogeneous systems exploiting virtual platforms","publication_year":2014,"publication_date":"2014-07-01","ids":{"openalex":"https://openalex.org/W2080033667","doi":"https://doi.org/10.1109/samos.2014.6893188","mag":"2080033667"},"language":"en","primary_location":{"id":"doi:10.1109/samos.2014.6893188","is_oa":false,"landing_page_url":"https://doi.org/10.1109/samos.2014.6893188","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5049984593","display_name":"Efstathios Sotiriou-Xanthopoulos","orcid":"https://orcid.org/0000-0001-8323-3747"},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":true,"raw_author_name":"Efstathios Sotiriou-Xanthopoulos","raw_affiliation_strings":["School of Electrical and Computer Engineering, National Technical University of Athens, Athens, Greece","School of Electrical and Computer Engg., National Technical University of Athens, Greece"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, National Technical University of Athens, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]},{"raw_affiliation_string":"School of Electrical and Computer Engg., National Technical University of Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076432415","display_name":"Sotirios Xydis","orcid":"https://orcid.org/0000-0003-3151-2730"},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Sotirios Xydis","raw_affiliation_strings":["School of Electrical and Computer Engineering, National Technical University of Athens, Athens, Greece","School of Electrical and Computer Engg., National Technical University of Athens, Greece"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, National Technical University of Athens, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]},{"raw_affiliation_string":"School of Electrical and Computer Engg., National Technical University of Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072486756","display_name":"Kostas Siozios","orcid":"https://orcid.org/0000-0002-0285-2202"},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Kostas Siozios","raw_affiliation_strings":["School of Electrical and Computer Engineering, National Technical University of Athens, Athens, Greece","School of Electrical and Computer Engg., National Technical University of Athens, Greece"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, National Technical University of Athens, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]},{"raw_affiliation_string":"School of Electrical and Computer Engg., National Technical University of Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5089110665","display_name":"George Economakos","orcid":null},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"George Economakos","raw_affiliation_strings":["School of Electrical and Computer Engineering, National Technical University of Athens, Athens, Greece","School of Electrical and Computer Engg., National Technical University of Athens, Greece"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, National Technical University of Athens, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]},{"raw_affiliation_string":"School of Electrical and Computer Engg., National Technical University of Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5049984593"],"corresponding_institution_ids":["https://openalex.org/I174458059"],"apc_list":null,"apc_paid":null,"fwci":1.8389,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.85657265,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":"13","issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7663846015930176},{"id":"https://openalex.org/keywords/systemc","display_name":"SystemC","score":0.7101864218711853},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.7010906934738159},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.6286695003509521},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6104137897491455},{"id":"https://openalex.org/keywords/virtual-prototyping","display_name":"Virtual prototyping","score":0.5849261283874512},{"id":"https://openalex.org/keywords/hardware-acceleration","display_name":"Hardware acceleration","score":0.5632109045982361},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.5436564683914185},{"id":"https://openalex.org/keywords/symmetric-multiprocessor-system","display_name":"Symmetric multiprocessor system","score":0.4405059218406677},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.425216406583786},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.26353055238723755},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.22790485620498657},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.22073540091514587},{"id":"https://openalex.org/keywords/simulation","display_name":"Simulation","score":0.18691548705101013},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.09244728088378906}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7663846015930176},{"id":"https://openalex.org/C2776928060","wikidata":"https://www.wikidata.org/wiki/Q1753563","display_name":"SystemC","level":2,"score":0.7101864218711853},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.7010906934738159},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.6286695003509521},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6104137897491455},{"id":"https://openalex.org/C2780991453","wikidata":"https://www.wikidata.org/wiki/Q3408177","display_name":"Virtual prototyping","level":2,"score":0.5849261283874512},{"id":"https://openalex.org/C13164978","wikidata":"https://www.wikidata.org/wiki/Q600158","display_name":"Hardware acceleration","level":3,"score":0.5632109045982361},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5436564683914185},{"id":"https://openalex.org/C172430144","wikidata":"https://www.wikidata.org/wiki/Q17111997","display_name":"Symmetric multiprocessor system","level":2,"score":0.4405059218406677},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.425216406583786},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.26353055238723755},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.22790485620498657},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.22073540091514587},{"id":"https://openalex.org/C44154836","wikidata":"https://www.wikidata.org/wiki/Q45045","display_name":"Simulation","level":1,"score":0.18691548705101013},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.09244728088378906}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/samos.2014.6893188","is_oa":false,"landing_page_url":"https://doi.org/10.1109/samos.2014.6893188","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1604727120","https://openalex.org/W1967480923","https://openalex.org/W1968547622","https://openalex.org/W1974274517","https://openalex.org/W1980377171","https://openalex.org/W1990249917","https://openalex.org/W2015309039","https://openalex.org/W2074558871","https://openalex.org/W2089162427","https://openalex.org/W2096001533","https://openalex.org/W2128317332","https://openalex.org/W2147726041","https://openalex.org/W2162217841","https://openalex.org/W3144225254","https://openalex.org/W4249472430","https://openalex.org/W6636003807","https://openalex.org/W6683896540"],"related_works":["https://openalex.org/W3015414207","https://openalex.org/W4234221021","https://openalex.org/W2548514518","https://openalex.org/W2119904701","https://openalex.org/W2790192245","https://openalex.org/W2170029576","https://openalex.org/W2159088510","https://openalex.org/W2119674509","https://openalex.org/W2007493856","https://openalex.org/W2059569687"],"abstract_inverted_index":{"Modern":[0],"multiprocessor":[1],"heterogeneous":[2,119,188],"systems":[3],"incorporating":[4],"multiple":[5,196],"hardware":[6],"accelerators":[7],"on":[8,110],"chip":[9],"have":[10,23],"resulted":[11],"in":[12,16],"an":[13,88,187],"excessive":[14],"increase":[15],"the":[17,45,99,132,147,150,156,162,173,199,202],"complexity":[18],"of":[19,92,98,112,131,136,195,201,223],"hardware/software":[20,180],"co-design.":[21],"Designers":[22],"now":[24],"to":[25,57,94,144,170,210],"explore":[26],"a":[27,73,107],"design":[28,42,82,100,157,206],"space":[29,158],"including":[30],"both":[31,146],"per-accelerator":[32],"architectural":[33],"parameters":[34],"as":[35,37,48,69,155],"well":[36],"inter-accelerator":[38],"combinations,":[39],"i.e.":[40],"different":[41,53,58],"configurations":[43,126],"among":[44],"allocated":[46],"accelerators,":[47],"each":[49,128],"accelerator":[50,129],"instance":[51],"has":[52],"computational":[54],"requirements,":[55],"according":[56],"input":[59],"data,":[60],"while":[61,218],"throughput":[62,151],"and":[63,149],"area":[64,148,213],"constraints":[65],"should":[66],"be":[67],"met":[68],"well.":[70],"Under":[71],"such":[72],"system":[74,190],"scenario,":[75],"virtual":[76,113,133],"platform":[77],"prototyping":[78,114],"suffers":[79],"from":[80],"increased":[81],"time":[83,221],"phases,":[84],"since":[85],"it":[86],"requires":[87],"exponentially":[89],"larger":[90],"number":[91],"evaluations":[93],"succeed":[95],"adequate":[96],"coverage":[97],"space.":[101],"In":[102,153],"this":[103],"paper,":[104],"we":[105],"propose":[106],"co-design":[108,181],"framework":[109,123,164],"top":[111],"solution,":[115],"customized":[116],"for":[117,127,191],"many-accelerator":[118],"systems.":[120],"The":[121],"proposed":[122,163,203],"defines":[124],"separate":[125],"component":[130],"platform,":[134],"instead":[135],"using":[137],"only":[138],"one":[139],"common":[140],"configuration,":[141],"thus":[142,177],"succeeding":[143],"meet":[145],"constraints.":[152],"addition,":[154],"size":[159],"increases":[160],"exponentially,":[161],"utilizes":[165],"process-based":[166],"reconfigurable":[167],"SystemC":[168],"modules":[169],"intelligently":[171],"bypass":[172],"non-productive":[174],"simulation":[175,220],"stages,":[176],"delivering":[178,205],"faster":[179],"cycles.":[182],"A":[183],"case":[184],"study":[185],"emulating":[186],"server":[189],"simultaneous":[192],"video":[193],"decoding":[194],"streams":[197],"shows":[198],"efficiency":[200],"approach,":[204],"solutions":[207],"with":[208],"up":[209],"1.58\u00d7":[211],"improved":[212,216],"or":[214],"1.59\u00d7":[215],"throughput,":[217],"achieving":[219],"gains":[222],"40%.":[224]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}