{"id":"https://openalex.org/W2023900465","doi":"https://doi.org/10.1109/samos.2013.6621109","title":"MGSim &amp;#x2014; A simulation environment for multi-core research and education","display_name":"MGSim &amp;#x2014; A simulation environment for multi-core research and education","publication_year":2013,"publication_date":"2013-07-01","ids":{"openalex":"https://openalex.org/W2023900465","doi":"https://doi.org/10.1109/samos.2013.6621109","mag":"2023900465"},"language":"en","primary_location":{"id":"doi:10.1109/samos.2013.6621109","is_oa":false,"landing_page_url":"https://doi.org/10.1109/samos.2013.6621109","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5007097526","display_name":"Rapha\u00ebl Poss","orcid":"https://orcid.org/0000-0001-7067-3145"},"institutions":[{"id":"https://openalex.org/I887064364","display_name":"University of Amsterdam","ror":"https://ror.org/04dkp9463","country_code":"NL","type":"education","lineage":["https://openalex.org/I887064364"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Raphael Poss","raw_affiliation_strings":["Computer Systems Architecture group, University of Amsterdam, Amsterdam, Netherlands","Comput. Syst. Archit. Group, Univ. of Amsterdam, Amsterdam, Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Systems Architecture group, University of Amsterdam, Amsterdam, Netherlands","institution_ids":["https://openalex.org/I887064364"]},{"raw_affiliation_string":"Comput. Syst. Archit. Group, Univ. of Amsterdam, Amsterdam, Netherlands","institution_ids":["https://openalex.org/I887064364"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047939440","display_name":"Mike Lankamp","orcid":null},"institutions":[{"id":"https://openalex.org/I887064364","display_name":"University of Amsterdam","ror":"https://ror.org/04dkp9463","country_code":"NL","type":"education","lineage":["https://openalex.org/I887064364"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Mike Lankamp","raw_affiliation_strings":["Computer Systems Architecture group, University of Amsterdam, Amsterdam, Netherlands","Comput. Syst. Archit. Group, Univ. of Amsterdam, Amsterdam, Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Systems Architecture group, University of Amsterdam, Amsterdam, Netherlands","institution_ids":["https://openalex.org/I887064364"]},{"raw_affiliation_string":"Comput. Syst. Archit. Group, Univ. of Amsterdam, Amsterdam, Netherlands","institution_ids":["https://openalex.org/I887064364"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100636286","display_name":"Qiang Yang","orcid":"https://orcid.org/0000-0001-5059-8360"},"institutions":[{"id":"https://openalex.org/I887064364","display_name":"University of Amsterdam","ror":"https://ror.org/04dkp9463","country_code":"NL","type":"education","lineage":["https://openalex.org/I887064364"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Qiang Yang","raw_affiliation_strings":["Computer Systems Architecture group, University of Amsterdam, Amsterdam, Netherlands","Comput. Syst. Archit. Group, Univ. of Amsterdam, Amsterdam, Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Systems Architecture group, University of Amsterdam, Amsterdam, Netherlands","institution_ids":["https://openalex.org/I887064364"]},{"raw_affiliation_string":"Comput. Syst. Archit. Group, Univ. of Amsterdam, Amsterdam, Netherlands","institution_ids":["https://openalex.org/I887064364"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008984631","display_name":"Jian Fu","orcid":"https://orcid.org/0000-0002-7324-4124"},"institutions":[{"id":"https://openalex.org/I887064364","display_name":"University of Amsterdam","ror":"https://ror.org/04dkp9463","country_code":"NL","type":"education","lineage":["https://openalex.org/I887064364"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Jian Fu","raw_affiliation_strings":["Computer Systems Architecture group, University of Amsterdam, Amsterdam, Netherlands","Comput. Syst. Archit. Group, Univ. of Amsterdam, Amsterdam, Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Systems Architecture group, University of Amsterdam, Amsterdam, Netherlands","institution_ids":["https://openalex.org/I887064364"]},{"raw_affiliation_string":"Comput. Syst. Archit. Group, Univ. of Amsterdam, Amsterdam, Netherlands","institution_ids":["https://openalex.org/I887064364"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047672519","display_name":"M. Irfan Uddin","orcid":"https://orcid.org/0000-0002-1355-3881"},"institutions":[{"id":"https://openalex.org/I887064364","display_name":"University of Amsterdam","ror":"https://ror.org/04dkp9463","country_code":"NL","type":"education","lineage":["https://openalex.org/I887064364"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Irfan Uddin","raw_affiliation_strings":["Computer Systems Architecture group, University of Amsterdam, Amsterdam, Netherlands","Comput. Syst. Archit. Group, Univ. of Amsterdam, Amsterdam, Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Systems Architecture group, University of Amsterdam, Amsterdam, Netherlands","institution_ids":["https://openalex.org/I887064364"]},{"raw_affiliation_string":"Comput. Syst. Archit. Group, Univ. of Amsterdam, Amsterdam, Netherlands","institution_ids":["https://openalex.org/I887064364"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5077847640","display_name":"Chris Jesshope","orcid":null},"institutions":[{"id":"https://openalex.org/I887064364","display_name":"University of Amsterdam","ror":"https://ror.org/04dkp9463","country_code":"NL","type":"education","lineage":["https://openalex.org/I887064364"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Chris R. Jesshope","raw_affiliation_strings":["Computer Systems Architecture group, University of Amsterdam, Amsterdam, Netherlands","Comput. Syst. Archit. Group, Univ. of Amsterdam, Amsterdam, Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Systems Architecture group, University of Amsterdam, Amsterdam, Netherlands","institution_ids":["https://openalex.org/I887064364"]},{"raw_affiliation_string":"Comput. Syst. Archit. Group, Univ. of Amsterdam, Amsterdam, Netherlands","institution_ids":["https://openalex.org/I887064364"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I887064364"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"80","last_page":"87"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/multithreading","display_name":"Multithreading","score":0.7922309041023254},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7487601041793823},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5648679733276367},{"id":"https://openalex.org/keywords/discrete-event-simulation","display_name":"Discrete event simulation","score":0.5568305253982544},{"id":"https://openalex.org/keywords/concurrency","display_name":"Concurrency","score":0.5372422337532043},{"id":"https://openalex.org/keywords/component","display_name":"Component (thermodynamics)","score":0.501061201095581},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.48502296209335327},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.47828611731529236},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.47703713178634644},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.47024527192115784},{"id":"https://openalex.org/keywords/event","display_name":"Event (particle physics)","score":0.4623815417289734},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.45206037163734436},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.4283062815666199},{"id":"https://openalex.org/keywords/core","display_name":"Core (optical fiber)","score":0.42373839020729065},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4127331078052521},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3679662346839905},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.31466102600097656},{"id":"https://openalex.org/keywords/simulation","display_name":"Simulation","score":0.10895636677742004},{"id":"https://openalex.org/keywords/thread","display_name":"Thread (computing)","score":0.10521930456161499}],"concepts":[{"id":"https://openalex.org/C201410400","wikidata":"https://www.wikidata.org/wiki/Q1064412","display_name":"Multithreading","level":3,"score":0.7922309041023254},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7487601041793823},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5648679733276367},{"id":"https://openalex.org/C147203929","wikidata":"https://www.wikidata.org/wiki/Q574814","display_name":"Discrete event simulation","level":2,"score":0.5568305253982544},{"id":"https://openalex.org/C193702766","wikidata":"https://www.wikidata.org/wiki/Q1414548","display_name":"Concurrency","level":2,"score":0.5372422337532043},{"id":"https://openalex.org/C168167062","wikidata":"https://www.wikidata.org/wiki/Q1117970","display_name":"Component (thermodynamics)","level":2,"score":0.501061201095581},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.48502296209335327},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.47828611731529236},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.47703713178634644},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.47024527192115784},{"id":"https://openalex.org/C2779662365","wikidata":"https://www.wikidata.org/wiki/Q5416694","display_name":"Event (particle physics)","level":2,"score":0.4623815417289734},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.45206037163734436},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.4283062815666199},{"id":"https://openalex.org/C2164484","wikidata":"https://www.wikidata.org/wiki/Q5170150","display_name":"Core (optical fiber)","level":2,"score":0.42373839020729065},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4127331078052521},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3679662346839905},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.31466102600097656},{"id":"https://openalex.org/C44154836","wikidata":"https://www.wikidata.org/wiki/Q45045","display_name":"Simulation","level":1,"score":0.10895636677742004},{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.10521930456161499},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0}],"mesh":[],"locations_count":4,"locations":[{"id":"doi:10.1109/samos.2013.6621109","is_oa":false,"landing_page_url":"https://doi.org/10.1109/samos.2013.6621109","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)","raw_type":"proceedings-article"},{"id":"pmh:oai:dare.uva.nl:openaire_cris_publications/cba2ab8a-9e80-481b-aaac-adb40e83c2ce","is_oa":false,"landing_page_url":"https://handle.uba.uva.nl/personal/pure/en/publications/mgsim--a-simulation-environment-for-multicore-research-and-education(cba2ab8a-9e80-481b-aaac-adb40e83c2ce).html","pdf_url":null,"source":{"id":"https://openalex.org/S4306400088","display_name":"UvA-DARE (University of Amsterdam)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I887064364","host_organization_name":"University of Amsterdam","host_organization_lineage":["https://openalex.org/I887064364"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Poss, R, Lankamp, M, Yang, Q, Fu, J, Uddin, I & Jesshope, C R 2013, MGSim - a simulation environment for multi-core research and education. in H Jeschke & O Silv\u00e9n (eds), 2013 International Conference on Embedded Computer Systems, Architectures, Modeling and Simulation: IC-SAMOS 2013: proceedings: July 15-18, 2013, Samos, Greece. Piscataway, NJ, pp. 80-87, IC-SAMOS 2013, 15/07/13. https://doi.org/10.1109/SAMOS.2013.6621109","raw_type":"info:eu-repo/semantics/conferenceObject"},{"id":"pmh:oai:repository.hkust.edu.hk:1783.1-165154","is_oa":false,"landing_page_url":"http://repository.hkust.edu.hk/ir/Record/1783.1-165154","pdf_url":null,"source":{"id":"https://openalex.org/S4306401796","display_name":"Rare & Special e-Zone (The Hong Kong University of Science and Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I200769079","host_organization_name":"Hong Kong University of Science and Technology","host_organization_lineage":["https://openalex.org/I200769079"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Conference paper"},{"id":"pmh:uvapub:oai:dare.uva.nl:publications/cba2ab8a-9e80-481b-aaac-adb40e83c2ce","is_oa":false,"landing_page_url":"https://dare.uva.nl/personal/pure/en/publications/mgsim--a-simulation-environment-for-multicore-research-and-education(cba2ab8a-9e80-481b-aaac-adb40e83c2ce).html","pdf_url":null,"source":{"id":"https://openalex.org/S4306401843","display_name":"Data Archiving and Networked Services (DANS)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1322597698","host_organization_name":"Royal Netherlands Academy of Arts and Sciences","host_organization_lineage":["https://openalex.org/I1322597698"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"2013 International Conference on Embedded Computer Systems, Architectures, Modeling and Simulation: IC-SAMOS 2013: proceedings: July 15-18, 2013, Samos, Greece, 80 - 87","raw_type":"info:eu-repo/semantics/conferencepaper"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1486941085","https://openalex.org/W1557267525","https://openalex.org/W1717525703","https://openalex.org/W1935357338","https://openalex.org/W1975147763","https://openalex.org/W1991719033","https://openalex.org/W1999277510","https://openalex.org/W2044206819","https://openalex.org/W2063057674","https://openalex.org/W2075943334","https://openalex.org/W2102604868","https://openalex.org/W2138030026","https://openalex.org/W2145022480","https://openalex.org/W2156260644","https://openalex.org/W2159832478","https://openalex.org/W2167314413","https://openalex.org/W2168113051","https://openalex.org/W2216872049","https://openalex.org/W2471569172","https://openalex.org/W6629367629"],"related_works":["https://openalex.org/W2482815832","https://openalex.org/W2294358097","https://openalex.org/W2189498595","https://openalex.org/W1993191611","https://openalex.org/W1999755551","https://openalex.org/W4238392246","https://openalex.org/W2578331457","https://openalex.org/W2029518214","https://openalex.org/W3142189107","https://openalex.org/W1991992759"],"abstract_inverted_index":{"This":[0],"article":[1],"presents":[2],"MGSim":[3,24,83,93],"<sup":[4],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[5],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">1</sup>":[6],",":[7],"an":[8],"open":[9],"source":[10],"discrete":[11],"event":[12],"simulator":[13],"for":[14,51,111],"on-chip":[15],"hardware":[16,44,90],"components":[17],"developed":[18],"at":[19],"the":[20,34],"University":[21],"of":[22],"Amsterdam.":[23],"is":[25,94,109],"used":[26],"as":[27,118],"research":[28],"and":[29,42,64,71,74,100],"teaching":[30],"vehicle":[31],"to":[32,104],"study":[33],"fine-grained":[35],"hardware/software":[36],"interactions":[37],"on":[38],"many-core":[39],"chips":[40],"with":[41,54,82,89],"without":[43],"multithreading.":[45],"MGSim's":[46],"component":[47],"library":[48],"includes":[49],"support":[50],"core":[52],"models":[53,113],"different":[55],"instruction":[56],"sets,":[57],"a":[58,67,86],"configurable":[59,62],"interconnect,":[60],"multiple":[61],"cache":[63],"memory":[65],"models,":[66],"dedicated":[68],"I/O":[69],"subsystem,":[70],"comprehensive":[72],"monitoring":[73],"interaction":[75],"facilities.":[76],"The":[77],"default":[78],"model":[79],"configuration":[80],"shipped":[81],"implements":[84],"Microgrids,":[85],"multi-core":[87],"architecture":[88,112],"concurrency":[91],"management.":[92],"furthermore":[95],"written":[96],"mostly":[97],"in":[98],"C++":[99],"uses":[101],"object":[102],"classes":[103],"represent":[105],"chip":[106],"components.":[107],"It":[108],"optimized":[110],"that":[114],"can":[115],"be":[116],"described":[117],"process":[119],"networks.":[120]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":4},{"year":2014,"cited_by_count":5},{"year":2013,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2016-06-24T00:00:00"}