{"id":"https://openalex.org/W2168025203","doi":"https://doi.org/10.1109/rtcsa.2014.6910545","title":"Memory power optimization on different memory address mapping schemas","display_name":"Memory power optimization on different memory address mapping schemas","publication_year":2014,"publication_date":"2014-08-01","ids":{"openalex":"https://openalex.org/W2168025203","doi":"https://doi.org/10.1109/rtcsa.2014.6910545","mag":"2168025203"},"language":"en","primary_location":{"id":"doi:10.1109/rtcsa.2014.6910545","is_oa":false,"landing_page_url":"https://doi.org/10.1109/rtcsa.2014.6910545","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 20th International Conference on Embedded and Real-Time Computing Systems and Applications","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5022299432","display_name":"Zongwei Zhu","orcid":"https://orcid.org/0000-0003-3607-2631"},"institutions":[{"id":"https://openalex.org/I126520041","display_name":"University of Science and Technology of China","ror":"https://ror.org/04c4dkn09","country_code":"CN","type":"education","lineage":["https://openalex.org/I126520041","https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zongwei Zhu","raw_affiliation_strings":["Department of Computer Science and Technology, University of Science and Technology of China (USTC), Hefei, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Technology, University of Science and Technology of China (USTC), Hefei, China","institution_ids":["https://openalex.org/I126520041"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100407758","display_name":"Xi Li","orcid":"https://orcid.org/0000-0003-3023-1662"},"institutions":[{"id":"https://openalex.org/I126520041","display_name":"University of Science and Technology of China","ror":"https://ror.org/04c4dkn09","country_code":"CN","type":"education","lineage":["https://openalex.org/I126520041","https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xi Li","raw_affiliation_strings":["Department of Computer Science and Technology, University of Science and Technology of China (USTC), Hefei, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Technology, University of Science and Technology of China (USTC), Hefei, China","institution_ids":["https://openalex.org/I126520041"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5082916478","display_name":"Chao Wang","orcid":"https://orcid.org/0000-0003-2167-6619"},"institutions":[{"id":"https://openalex.org/I126520041","display_name":"University of Science and Technology of China","ror":"https://ror.org/04c4dkn09","country_code":"CN","type":"education","lineage":["https://openalex.org/I126520041","https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Chao Wang","raw_affiliation_strings":["Department of Computer Science and Technology, University of Science and Technology of China (USTC), Hefei, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Technology, University of Science and Technology of China (USTC), Hefei, China","institution_ids":["https://openalex.org/I126520041"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5077322091","display_name":"Xuehai Zhou","orcid":"https://orcid.org/0000-0002-8360-3143"},"institutions":[{"id":"https://openalex.org/I126520041","display_name":"University of Science and Technology of China","ror":"https://ror.org/04c4dkn09","country_code":"CN","type":"education","lineage":["https://openalex.org/I126520041","https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xuehai Zhou","raw_affiliation_strings":["Department of Computer Science and Technology, University of Science and Technology of China (USTC), Hefei, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Technology, University of Science and Technology of China (USTC), Hefei, China","institution_ids":["https://openalex.org/I126520041"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I126520041"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.17909057,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"33","issue":null,"first_page":"1","last_page":"9"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11269","display_name":"Algorithms and Data Compression","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8361452221870422},{"id":"https://openalex.org/keywords/physical-address","display_name":"Physical address","score":0.6408307552337646},{"id":"https://openalex.org/keywords/registered-memory","display_name":"Registered memory","score":0.6380826234817505},{"id":"https://openalex.org/keywords/overlay","display_name":"Overlay","score":0.6177378296852112},{"id":"https://openalex.org/keywords/memory-map","display_name":"Memory map","score":0.5856913924217224},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.5525175333023071},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.5490350127220154},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.5316576957702637},{"id":"https://openalex.org/keywords/flat-memory-model","display_name":"Flat memory model","score":0.5033277869224548},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.383475124835968},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.33774086833000183},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.30077868700027466},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1968751847743988}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8361452221870422},{"id":"https://openalex.org/C41036726","wikidata":"https://www.wikidata.org/wiki/Q844824","display_name":"Physical address","level":3,"score":0.6408307552337646},{"id":"https://openalex.org/C93446704","wikidata":"https://www.wikidata.org/wiki/Q449328","display_name":"Registered memory","level":3,"score":0.6380826234817505},{"id":"https://openalex.org/C136085584","wikidata":"https://www.wikidata.org/wiki/Q910289","display_name":"Overlay","level":2,"score":0.6177378296852112},{"id":"https://openalex.org/C74426580","wikidata":"https://www.wikidata.org/wiki/Q719484","display_name":"Memory map","level":3,"score":0.5856913924217224},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.5525175333023071},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.5490350127220154},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.5316576957702637},{"id":"https://openalex.org/C57863822","wikidata":"https://www.wikidata.org/wiki/Q905488","display_name":"Flat memory model","level":4,"score":0.5033277869224548},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.383475124835968},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.33774086833000183},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.30077868700027466},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1968751847743988}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/rtcsa.2014.6910545","is_oa":false,"landing_page_url":"https://doi.org/10.1109/rtcsa.2014.6910545","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 20th International Conference on Embedded and Real-Time Computing Systems and Applications","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5099999904632568,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W1743133773","https://openalex.org/W1979866689","https://openalex.org/W1987912519","https://openalex.org/W2045999394","https://openalex.org/W2052936141","https://openalex.org/W2072753794","https://openalex.org/W2100384468","https://openalex.org/W2101587002","https://openalex.org/W2129513794","https://openalex.org/W2138146350","https://openalex.org/W2138488896","https://openalex.org/W2138661001","https://openalex.org/W2143823686","https://openalex.org/W2151121248","https://openalex.org/W2155702343","https://openalex.org/W2161029622","https://openalex.org/W2161264993","https://openalex.org/W2169875292","https://openalex.org/W2197215634","https://openalex.org/W2399232775","https://openalex.org/W3004935110","https://openalex.org/W4232038590","https://openalex.org/W4236312724","https://openalex.org/W4240156662","https://openalex.org/W6637917956"],"related_works":["https://openalex.org/W4312264564","https://openalex.org/W2491097902","https://openalex.org/W1554378476","https://openalex.org/W3021597805","https://openalex.org/W4379620206","https://openalex.org/W2354036839","https://openalex.org/W4243333834","https://openalex.org/W2407401575","https://openalex.org/W2062140197","https://openalex.org/W4232365528"],"abstract_inverted_index":{"Since":[0],"memory":[1,15,19,60,76,118,124,149,168,175,192,201],"accounts":[2],"for":[3,218,223],"a":[4,69,74,129,136,159,167],"large":[5],"and":[6,33,120,126,209],"increasing":[7],"fraction":[8],"of":[9,29,53,188,227,245],"the":[10,51,133,155,186,225,234,242,253],"energy":[11],"consumed":[12],"by":[13,49],"computers,":[14],"manufacturers":[16],"have":[17,43],"developed":[18],"devices":[20],"with":[21,185,262],"different":[22,59,104,181],"power/work":[23],"modes.":[24],"For":[25,132,154],"taking":[26],"full":[27],"advantage":[28],"these":[30,100],"modes,":[31],"more":[32,34,107],"creditable":[35],"hardware":[36],"or":[37],"software":[38],"power":[39,54,86,101,152,208,235,254],"mode":[40,55,87],"control":[41,56,88],"algorithms":[42],"been":[44],"proposed.":[45],"In":[46],"this":[47],"paper,":[48],"analyzing":[50],"effects":[52],"polices":[57],"on":[58,103,215,221],"address":[61,72,169],"mapping":[62,93,105,182],"schemas":[63,106],"(schema":[64],"is":[65],"used":[66],"to":[67,73,92,98,143,147,173,206,239,258],"translate":[68],"given":[70],"physical":[71],"specific":[75],"cell":[77],"in":[78,96],"DRAM":[79],"system),":[80],"we":[81,109,157],"find":[82],"that":[83,230,248],"most":[84],"previous":[85,264],"policies":[89],"are":[90],"sensitive":[91],"schemas.":[94,183],"Therefore,":[95],"order":[97],"manage":[99],"modes":[102],"effectively,":[108],"divide":[110],"them":[111],"into":[112,176],"two":[113],"categories:":[114],"high-bit":[115],"multi-access":[116,122],"cross":[117,123],"(HMCM)":[119],"low-bit":[121],"(LMCM),":[125],"then":[127],"take":[128],"targeted":[130],"optimization.":[131],"former":[134],"schema,":[135],"rank-sensitive":[137],"buddy":[138],"system":[139],"(RS-Buddy)":[140],"was":[141],"proposed":[142],"cluster":[144],"pages":[145],"together":[146],"prolong":[148],"modules'":[150],"low":[151],"time.":[153],"latter,":[156],"introduce":[158],"comprehensive":[160],"solution":[161],"named":[162],"as":[163,180],"MSPA.":[164],"It":[165],"adopts":[166],"segmentation":[170],"module":[171],"(MASM)":[172],"split":[174],"many":[177],"regions":[178],"configured":[179],"And":[184],"help":[187],"an":[189],"OS":[190],"power-aware":[191],"allocator":[193],"(PAMA),":[194],"MSPA":[195,249],"can":[196,232,250],"dynamically":[197],"allocate":[198],"one":[199],"application's":[200],"from":[202,237,256],"its":[203],"preferred":[204],"region":[205],"balance":[207],"performance.":[210],"By":[211],"performing":[212],"extensive":[213],"experiments":[214],"practical":[216],"platform":[217],"HMCM":[219,228],"while":[220],"simulator":[222],"LMCM,":[224],"results":[226,244],"show":[229],"RS-Buddy":[231],"optimize":[233],"efficiency":[236,255],"2%":[238],"22%.":[240],"Furthermore,":[241],"simulation":[243],"LMCM":[246],"demonstrate":[247],"further":[251],"improve":[252],"3%":[257],"17%":[259],"when":[260],"combined":[261],"other":[263],"state-of-the-art":[265],"studies.":[266]},"counts_by_year":[{"year":2019,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
