{"id":"https://openalex.org/W1606804836","doi":"https://doi.org/10.1109/rtas.2015.7108453","title":"Reverse-engineering embedded memory controllers through latency-based analysis","display_name":"Reverse-engineering embedded memory controllers through latency-based analysis","publication_year":2015,"publication_date":"2015-04-01","ids":{"openalex":"https://openalex.org/W1606804836","doi":"https://doi.org/10.1109/rtas.2015.7108453","mag":"1606804836"},"language":"en","primary_location":{"id":"doi:10.1109/rtas.2015.7108453","is_oa":false,"landing_page_url":"https://doi.org/10.1109/rtas.2015.7108453","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"21st IEEE Real-Time and Embedded Technology and Applications Symposium","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5069864154","display_name":"Mohamed Hassan","orcid":"https://orcid.org/0000-0001-5926-5861"},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Mohamed Hassan","raw_affiliation_strings":["University of Waterloo, Waterloo, Canada"],"affiliations":[{"raw_affiliation_string":"University of Waterloo, Waterloo, Canada","institution_ids":["https://openalex.org/I151746483"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073862711","display_name":"Anirudh Mohan Kaushik","orcid":"https://orcid.org/0000-0002-8347-0109"},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Anirudh M. Kaushik","raw_affiliation_strings":["University of Waterloo, Waterloo, Canada"],"affiliations":[{"raw_affiliation_string":"University of Waterloo, Waterloo, Canada","institution_ids":["https://openalex.org/I151746483"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5074065388","display_name":"Hiren Patel","orcid":"https://orcid.org/0000-0003-2750-4471"},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Hiren Patel","raw_affiliation_strings":["University of Waterloo, Waterloo, Canada"],"affiliations":[{"raw_affiliation_string":"University of Waterloo, Waterloo, Canada","institution_ids":["https://openalex.org/I151746483"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5069864154"],"corresponding_institution_ids":["https://openalex.org/I151746483"],"apc_list":null,"apc_paid":null,"fwci":2.2609,"has_fulltext":false,"cited_by_count":19,"citation_normalized_percentile":{"value":0.87320898,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"297","last_page":"306"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8555245995521545},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.6937688589096069},{"id":"https://openalex.org/keywords/predictability","display_name":"Predictability","score":0.6486215591430664},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.5714830756187439},{"id":"https://openalex.org/keywords/cas-latency","display_name":"CAS latency","score":0.5623252987861633},{"id":"https://openalex.org/keywords/reverse-engineering","display_name":"Reverse engineering","score":0.5401039123535156},{"id":"https://openalex.org/keywords/arbitration","display_name":"Arbitration","score":0.5211982131004333},{"id":"https://openalex.org/keywords/cover","display_name":"Cover (algebra)","score":0.5204306244850159},{"id":"https://openalex.org/keywords/memory-controller","display_name":"Memory controller","score":0.45166754722595215},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.431937038898468},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.42043831944465637},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.34758859872817993},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3294149339199066},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.25221875309944153},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.13792431354522705}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8555245995521545},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.6937688589096069},{"id":"https://openalex.org/C197640229","wikidata":"https://www.wikidata.org/wiki/Q2534066","display_name":"Predictability","level":2,"score":0.6486215591430664},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.5714830756187439},{"id":"https://openalex.org/C189930140","wikidata":"https://www.wikidata.org/wiki/Q1112878","display_name":"CAS latency","level":4,"score":0.5623252987861633},{"id":"https://openalex.org/C207850805","wikidata":"https://www.wikidata.org/wiki/Q269608","display_name":"Reverse engineering","level":2,"score":0.5401039123535156},{"id":"https://openalex.org/C160151201","wikidata":"https://www.wikidata.org/wiki/Q207946","display_name":"Arbitration","level":2,"score":0.5211982131004333},{"id":"https://openalex.org/C2780428219","wikidata":"https://www.wikidata.org/wiki/Q16952335","display_name":"Cover (algebra)","level":2,"score":0.5204306244850159},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.45166754722595215},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.431937038898468},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.42043831944465637},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.34758859872817993},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3294149339199066},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.25221875309944153},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.13792431354522705},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C17744445","wikidata":"https://www.wikidata.org/wiki/Q36442","display_name":"Political science","level":0,"score":0.0},{"id":"https://openalex.org/C199539241","wikidata":"https://www.wikidata.org/wiki/Q7748","display_name":"Law","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/rtas.2015.7108453","is_oa":false,"landing_page_url":"https://doi.org/10.1109/rtas.2015.7108453","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"21st IEEE Real-Time and Embedded Technology and Applications Symposium","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7300000190734863,"display_name":"Peace, Justice and strong institutions","id":"https://metadata.un.org/sdg/16"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W1491189730","https://openalex.org/W1515422725","https://openalex.org/W1981191435","https://openalex.org/W1981588964","https://openalex.org/W2015827499","https://openalex.org/W2050143636","https://openalex.org/W2059385032","https://openalex.org/W2102800454","https://openalex.org/W2110195531","https://openalex.org/W2114052814","https://openalex.org/W2116826559","https://openalex.org/W2118296780","https://openalex.org/W2128544270","https://openalex.org/W2148543770","https://openalex.org/W2162639668","https://openalex.org/W2165683591","https://openalex.org/W2165697076","https://openalex.org/W2167233984","https://openalex.org/W3049619946","https://openalex.org/W3145997180","https://openalex.org/W4242621628","https://openalex.org/W6629553572","https://openalex.org/W6645901768","https://openalex.org/W6684364314","https://openalex.org/W6684747494"],"related_works":["https://openalex.org/W1976244802","https://openalex.org/W4293430534","https://openalex.org/W2335743642","https://openalex.org/W4297812927","https://openalex.org/W2800412005","https://openalex.org/W2122646225","https://openalex.org/W3140615508","https://openalex.org/W2029945810","https://openalex.org/W1954780666","https://openalex.org/W4320351610"],"abstract_inverted_index":{"We":[0,50],"explore":[1,85],"techniques":[2,33],"to":[3,26,34,43,59,64,71],"reverse-engineer":[4],"properties":[5,66],"of":[6,67,75],"DRAM":[7],"memory":[8],"controllers":[9],"(MCs).":[10],"This":[11],"includes":[12],"page":[13,76],"policies,":[14,77],"address":[15,78],"mapping":[16],"schemes":[17],"and":[18,39,55,80,93],"command":[19,81],"arbitration":[20,82],"schemes.":[21],"There":[22],"are":[23],"several":[24],"benefits":[25],"knowing":[27],"this":[28,57],"information:":[29],"they":[30,40],"allow":[31,41],"analysis":[32,58],"effectively":[35],"compute":[36],"worst-case":[37],"bounds,":[38],"customizations":[42],"be":[44],"made":[45],"in":[46],"software":[47],"for":[48,62],"predictability.":[49],"develop":[51],"a":[52,73,89],"latency-based":[53],"analysis,":[54],"use":[56],"devise":[60],"algorithms":[61],"micro-benchmarks":[63],"extract":[65],"MCs.":[68],"In":[69],"order":[70],"cover":[72],"breadth":[74],"mappings":[79],"schemes,":[83],"we":[84],"our":[86,95],"technique":[87],"using":[88],"micro-architecture":[90],"simulation":[91],"framework":[92],"document":[94],"findings.":[96]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":4},{"year":2017,"cited_by_count":2},{"year":2015,"cited_by_count":1}],"updated_date":"2026-02-02T03:55:41.653505","created_date":"2025-10-10T00:00:00"}