{"id":"https://openalex.org/W2223048839","doi":"https://doi.org/10.1109/rsp.2015.7416547","title":"Challenges for the parallelization of loosely timed SystemC programs","display_name":"Challenges for the parallelization of loosely timed SystemC programs","publication_year":2015,"publication_date":"2015-10-01","ids":{"openalex":"https://openalex.org/W2223048839","doi":"https://doi.org/10.1109/rsp.2015.7416547","mag":"2223048839"},"language":"en","primary_location":{"id":"doi:10.1109/rsp.2015.7416547","is_oa":false,"landing_page_url":"https://doi.org/10.1109/rsp.2015.7416547","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 International Symposium on Rapid System Prototyping (RSP)","raw_type":"proceedings-article"},"type":"preprint","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://hal.science/hal-01214891","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5056327183","display_name":"Denis Becker","orcid":"https://orcid.org/0000-0002-3303-9775"},"institutions":[{"id":"https://openalex.org/I4210156361","display_name":"Verimag","ror":"https://ror.org/05afmzm11","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210156361","https://openalex.org/I4210159245","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I4210104693","display_name":"STMicroelectronics (France)","ror":"https://ror.org/01c74sd89","country_code":"FR","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210104693"]},{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"funder","lineage":["https://openalex.org/I1294671590"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"Denis Becker","raw_affiliation_strings":["CNRS, VERIMAG, Grenoble, France","STMicroelectronics, Grenoble, France"],"affiliations":[{"raw_affiliation_string":"CNRS, VERIMAG, Grenoble, France","institution_ids":["https://openalex.org/I4210156361","https://openalex.org/I1294671590"]},{"raw_affiliation_string":"STMicroelectronics, Grenoble, France","institution_ids":["https://openalex.org/I4210104693"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5061125211","display_name":"Matthieu Moy","orcid":"https://orcid.org/0000-0002-6054-8882"},"institutions":[{"id":"https://openalex.org/I899635006","display_name":"Universit\u00e9 Grenoble Alpes","ror":"https://ror.org/02rx3b187","country_code":"FR","type":"education","lineage":["https://openalex.org/I899635006"]},{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"funder","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I4210156361","display_name":"Verimag","ror":"https://ror.org/05afmzm11","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210156361","https://openalex.org/I4210159245","https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Matthieu Moy","raw_affiliation_strings":["CNRS, VERIMAG, Grenoble, France","Univ. Grenoble Alpes, VERIMAG, Grenoble, France"],"affiliations":[{"raw_affiliation_string":"CNRS, VERIMAG, Grenoble, France","institution_ids":["https://openalex.org/I4210156361","https://openalex.org/I1294671590"]},{"raw_affiliation_string":"Univ. Grenoble Alpes, VERIMAG, Grenoble, France","institution_ids":["https://openalex.org/I4210156361","https://openalex.org/I899635006"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5043169928","display_name":"J\u00e9r\u00f4me Cornet","orcid":null},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"funder","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I4210156361","display_name":"Verimag","ror":"https://ror.org/05afmzm11","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210156361","https://openalex.org/I4210159245","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I4210104693","display_name":"STMicroelectronics (France)","ror":"https://ror.org/01c74sd89","country_code":"FR","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210104693"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Jerome Cornet","raw_affiliation_strings":["CNRS, VERIMAG, Grenoble, France","STMicroelectronics, Grenoble, France"],"affiliations":[{"raw_affiliation_string":"CNRS, VERIMAG, Grenoble, France","institution_ids":["https://openalex.org/I4210156361","https://openalex.org/I1294671590"]},{"raw_affiliation_string":"STMicroelectronics, Grenoble, France","institution_ids":["https://openalex.org/I4210104693"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5056327183"],"corresponding_institution_ids":["https://openalex.org/I1294671590","https://openalex.org/I4210104693","https://openalex.org/I4210156361"],"apc_list":null,"apc_paid":null,"fwci":0.9895,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.7737283,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"54","last_page":"60"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/systemc","display_name":"SystemC","score":0.9913558959960938},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8852858543395996},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.6729723811149597},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6375054121017456},{"id":"https://openalex.org/keywords/transaction-level-modeling","display_name":"Transaction-level modeling","score":0.49015507102012634},{"id":"https://openalex.org/keywords/model-of-computation","display_name":"Model of computation","score":0.48135143518447876},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.45553115010261536},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.45032185316085815},{"id":"https://openalex.org/keywords/context-switch","display_name":"Context switch","score":0.4275874197483063},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3387294411659241},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.332097589969635},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.3305239677429199}],"concepts":[{"id":"https://openalex.org/C2776928060","wikidata":"https://www.wikidata.org/wiki/Q1753563","display_name":"SystemC","level":2,"score":0.9913558959960938},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8852858543395996},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.6729723811149597},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6375054121017456},{"id":"https://openalex.org/C169571997","wikidata":"https://www.wikidata.org/wiki/Q966099","display_name":"Transaction-level modeling","level":3,"score":0.49015507102012634},{"id":"https://openalex.org/C184596265","wikidata":"https://www.wikidata.org/wiki/Q2651576","display_name":"Model of computation","level":3,"score":0.48135143518447876},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.45553115010261536},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.45032185316085815},{"id":"https://openalex.org/C53833338","wikidata":"https://www.wikidata.org/wiki/Q1061424","display_name":"Context switch","level":2,"score":0.4275874197483063},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3387294411659241},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.332097589969635},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.3305239677429199},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/rsp.2015.7416547","is_oa":false,"landing_page_url":"https://doi.org/10.1109/rsp.2015.7416547","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 International Symposium on Rapid System Prototyping (RSP)","raw_type":"proceedings-article"},{"id":"pmh:oai:HAL:hal-01214891v1","is_oa":true,"landing_page_url":"https://hal.science/hal-01214891","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE International Symposium on Rapid System Prototyping, Oct 2015, Amsterdam, Netherlands","raw_type":"Conference papers"}],"best_oa_location":{"id":"pmh:oai:HAL:hal-01214891v1","is_oa":true,"landing_page_url":"https://hal.science/hal-01214891","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE International Symposium on Rapid System Prototyping, Oct 2015, Amsterdam, Netherlands","raw_type":"Conference papers"},"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.5799999833106995,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":31,"referenced_works":["https://openalex.org/W583280196","https://openalex.org/W1608473921","https://openalex.org/W1990513804","https://openalex.org/W2000791263","https://openalex.org/W2030957136","https://openalex.org/W2047973795","https://openalex.org/W2048031428","https://openalex.org/W2049297979","https://openalex.org/W2063434018","https://openalex.org/W2068289719","https://openalex.org/W2078290061","https://openalex.org/W2100512555","https://openalex.org/W2109161590","https://openalex.org/W2119658153","https://openalex.org/W2120965356","https://openalex.org/W2130999149","https://openalex.org/W2142897208","https://openalex.org/W2147780001","https://openalex.org/W2155502560","https://openalex.org/W2168236892","https://openalex.org/W2181746836","https://openalex.org/W2543717812","https://openalex.org/W3142366035","https://openalex.org/W3144573862","https://openalex.org/W3144680781","https://openalex.org/W4240473021","https://openalex.org/W4240676688","https://openalex.org/W4242746511","https://openalex.org/W4254719374","https://openalex.org/W6650622433","https://openalex.org/W6686254048"],"related_works":["https://openalex.org/W2208074837","https://openalex.org/W2531335688","https://openalex.org/W2094504193","https://openalex.org/W2166942069","https://openalex.org/W4294043016","https://openalex.org/W1550409889","https://openalex.org/W2105799861","https://openalex.org/W4293261662","https://openalex.org/W3143527577","https://openalex.org/W2168814075"],"abstract_inverted_index":{"SystemC/TLM":[0,165],"models":[1,104],"are":[2,80,105],"commonly":[3],"used":[4,146],"in":[5,95,110,147,161],"the":[6,20,35,42,50,58,93,106,120,162],"industry":[7],"to":[8,82,130],"provide":[9],"an":[10,90],"early":[11],"SoC":[12],"simulation":[13],"environment.":[14],"The":[15,25],"open":[16],"source":[17],"implementation":[18],"of":[19,47,52,60,78,92,119,140,164],"SystemC":[21,61,74,124],"simulator":[22],"is":[23,63],"sequential.":[24],"standard":[26],"doesn't":[27],"impose":[28],"sequential":[29],"executions,":[30],"but":[31,76],"makes":[32],"this":[33,86,111,135],"choice":[34],"easiest":[36],"by":[37],"imposing":[38],"coroutine":[39],"semantics.":[40],"With":[41],"increasing":[43],"size":[44],"and":[45,49,157],"complexity":[46],"models,":[48],"multiplication":[51],"computation":[53],"cores":[54],"on":[55,143],"recent":[56],"machines,":[57],"parallelization":[59,125,163],"simulations":[62],"a":[64,138,144],"major":[65],"research":[66],"concern.":[67],"There":[68],"have":[69],"been":[70],"several":[71],"proposals":[72],"for":[73,123],"parallelization,":[75],"most":[77,118],"them":[79],"limited":[81],"cycle-accurate":[83],"models.":[84,132,166],"In":[85],"paper":[87,152],"we":[88],"give":[89],"overview":[91],"practices":[94],"one":[96],"industrial":[97],"context.":[98,112],"We":[99,113,133],"explain":[100],"why":[101],"loosely":[102],"timed":[103],"only":[107],"viable":[108],"option":[109],"also":[114],"show":[115],"that":[116],"unfortunately,":[117],"existing":[121,155],"approaches":[122],"can":[126],"fundamentally":[127],"not":[128],"apply":[129],"these":[131],"support":[134],"claim":[136],"with":[137],"set":[139],"measurements":[141],"performed":[142],"platform":[145],"production":[148],"at":[149],"STMicroelectronics.":[150],"This":[151],"both":[153],"surveys":[154],"techniques":[156],"identifies":[158],"unsolved":[159],"challenges":[160]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2016,"cited_by_count":1}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}
