{"id":"https://openalex.org/W2005203204","doi":"https://doi.org/10.1109/rsp.2014.6966901","title":"FPGA-based prototyping systems for emerging memory technologies","display_name":"FPGA-based prototyping systems for emerging memory technologies","publication_year":2014,"publication_date":"2014-10-01","ids":{"openalex":"https://openalex.org/W2005203204","doi":"https://doi.org/10.1109/rsp.2014.6966901","mag":"2005203204"},"language":"en","primary_location":{"id":"doi:10.1109/rsp.2014.6966901","is_oa":false,"landing_page_url":"https://doi.org/10.1109/rsp.2014.6966901","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 25nd IEEE International Symposium on Rapid System Prototyping","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101468218","display_name":"Taemin Lee","orcid":"https://orcid.org/0000-0002-2694-2907"},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Taemin Lee","raw_affiliation_strings":["Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Korea","Embedded System Architecture Laboratory Department of Electrical Engineering Pohang University of Science and Technology (POSTECH) Pohang, Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Korea","institution_ids":["https://openalex.org/I123900574"]},{"raw_affiliation_string":"Embedded System Architecture Laboratory Department of Electrical Engineering Pohang University of Science and Technology (POSTECH) Pohang, Korea","institution_ids":["https://openalex.org/I123900574"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055644098","display_name":"Dongki Kim","orcid":"https://orcid.org/0000-0001-5277-9632"},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Dongki Kim","raw_affiliation_strings":["Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Korea","Embedded System Architecture Laboratory Department of Electrical Engineering Pohang University of Science and Technology (POSTECH) Pohang, Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Korea","institution_ids":["https://openalex.org/I123900574"]},{"raw_affiliation_string":"Embedded System Architecture Laboratory Department of Electrical Engineering Pohang University of Science and Technology (POSTECH) Pohang, Korea","institution_ids":["https://openalex.org/I123900574"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5026159722","display_name":"Hyunsun Park","orcid":"https://orcid.org/0000-0003-1338-654X"},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Hyunsun Park","raw_affiliation_strings":["Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Korea","Embedded System Architecture Laboratory Department of Electrical Engineering Pohang University of Science and Technology (POSTECH) Pohang, Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Korea","institution_ids":["https://openalex.org/I123900574"]},{"raw_affiliation_string":"Embedded System Architecture Laboratory Department of Electrical Engineering Pohang University of Science and Technology (POSTECH) Pohang, Korea","institution_ids":["https://openalex.org/I123900574"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063521444","display_name":"Sungjoo Yoo","orcid":"https://orcid.org/0000-0002-5853-0675"},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Sungjoo Yoo","raw_affiliation_strings":["Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Korea","Embedded System Architecture Laboratory Department of Electrical Engineering Pohang University of Science and Technology (POSTECH) Pohang, Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Korea","institution_ids":["https://openalex.org/I123900574"]},{"raw_affiliation_string":"Embedded System Architecture Laboratory Department of Electrical Engineering Pohang University of Science and Technology (POSTECH) Pohang, Korea","institution_ids":["https://openalex.org/I123900574"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5048785540","display_name":"Sunggu Lee","orcid":"https://orcid.org/0000-0003-3858-0779"},"institutions":[{"id":"https://openalex.org/I123900574","display_name":"Pohang University of Science and Technology","ror":"https://ror.org/04xysgw12","country_code":"KR","type":"education","lineage":["https://openalex.org/I123900574"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Sunggu Lee","raw_affiliation_strings":["Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Korea","Embedded System Architecture Laboratory Department of Electrical Engineering Pohang University of Science and Technology (POSTECH) Pohang, Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Pohang University of Science and Technology (POSTECH), Pohang, Korea","institution_ids":["https://openalex.org/I123900574"]},{"raw_affiliation_string":"Embedded System Architecture Laboratory Department of Electrical Engineering Pohang University of Science and Technology (POSTECH) Pohang, Korea","institution_ids":["https://openalex.org/I123900574"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I123900574"],"apc_list":null,"apc_paid":null,"fwci":3.426,"has_fulltext":false,"cited_by_count":29,"citation_normalized_percentile":{"value":0.93086098,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"115","last_page":"120"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7722419500350952},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.724086344242096},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6873753070831299},{"id":"https://openalex.org/keywords/registered-memory","display_name":"Registered memory","score":0.5956434607505798},{"id":"https://openalex.org/keywords/cas-latency","display_name":"CAS latency","score":0.5294413566589355},{"id":"https://openalex.org/keywords/emulation","display_name":"Emulation","score":0.5190511345863342},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.5112931728363037},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.4823731482028961},{"id":"https://openalex.org/keywords/memory-map","display_name":"Memory map","score":0.4573816955089569},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.448220819234848},{"id":"https://openalex.org/keywords/conventional-memory","display_name":"Conventional memory","score":0.4459446966648102},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.43583282828330994},{"id":"https://openalex.org/keywords/universal-memory","display_name":"Universal memory","score":0.4338498115539551},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.43111658096313477},{"id":"https://openalex.org/keywords/extended-memory","display_name":"Extended memory","score":0.40623360872268677},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4003024101257324},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.3900042772293091},{"id":"https://openalex.org/keywords/memory-controller","display_name":"Memory controller","score":0.3854975700378418},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3537331521511078},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.31160402297973633}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7722419500350952},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.724086344242096},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6873753070831299},{"id":"https://openalex.org/C93446704","wikidata":"https://www.wikidata.org/wiki/Q449328","display_name":"Registered memory","level":3,"score":0.5956434607505798},{"id":"https://openalex.org/C189930140","wikidata":"https://www.wikidata.org/wiki/Q1112878","display_name":"CAS latency","level":4,"score":0.5294413566589355},{"id":"https://openalex.org/C149810388","wikidata":"https://www.wikidata.org/wiki/Q5374873","display_name":"Emulation","level":2,"score":0.5190511345863342},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.5112931728363037},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.4823731482028961},{"id":"https://openalex.org/C74426580","wikidata":"https://www.wikidata.org/wiki/Q719484","display_name":"Memory map","level":3,"score":0.4573816955089569},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.448220819234848},{"id":"https://openalex.org/C53838383","wikidata":"https://www.wikidata.org/wiki/Q541148","display_name":"Conventional memory","level":5,"score":0.4459446966648102},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.43583282828330994},{"id":"https://openalex.org/C195053848","wikidata":"https://www.wikidata.org/wiki/Q7894141","display_name":"Universal memory","level":5,"score":0.4338498115539551},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.43111658096313477},{"id":"https://openalex.org/C171675096","wikidata":"https://www.wikidata.org/wiki/Q1143380","display_name":"Extended memory","level":4,"score":0.40623360872268677},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4003024101257324},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.3900042772293091},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.3854975700378418},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3537331521511078},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.31160402297973633},{"id":"https://openalex.org/C50522688","wikidata":"https://www.wikidata.org/wiki/Q189833","display_name":"Economic growth","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/rsp.2014.6966901","is_oa":false,"landing_page_url":"https://doi.org/10.1109/rsp.2014.6966901","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 25nd IEEE International Symposium on Rapid System Prototyping","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.4000000059604645,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W143350511","https://openalex.org/W1520248310","https://openalex.org/W1973735988","https://openalex.org/W2022631813","https://openalex.org/W2028802049","https://openalex.org/W2048588974","https://openalex.org/W2076217257","https://openalex.org/W2102449048","https://openalex.org/W2105271931","https://openalex.org/W2112753327","https://openalex.org/W2135393827","https://openalex.org/W2147539449","https://openalex.org/W2147926533","https://openalex.org/W2150662965","https://openalex.org/W2163083688","https://openalex.org/W3026883080","https://openalex.org/W6631143543","https://openalex.org/W6643655087","https://openalex.org/W6669455285","https://openalex.org/W6684025240","https://openalex.org/W6777931879"],"related_works":["https://openalex.org/W3048967625","https://openalex.org/W2138825797","https://openalex.org/W2019238062","https://openalex.org/W2065759842","https://openalex.org/W101244504","https://openalex.org/W2896161911","https://openalex.org/W2155643858","https://openalex.org/W2769869222","https://openalex.org/W2985656529","https://openalex.org/W2005203204"],"abstract_inverted_index":{"As":[0],"DRAM":[1,17,62],"faces":[2],"scaling":[3],"limit,":[4],"several":[5],"new":[6,24,78,97,106,120],"memory":[7,79,107],"technologies":[8],"are":[9],"considered":[10],"as":[11],"candidates":[12],"for":[13,54],"replacing":[14],"or":[15],"complementing":[16],"main":[18,57],"memory.":[19,131],"Compared":[20],"to":[21,48],"DRAM,":[22],"the":[23,71,74,94,103,117],"memories":[25],"have":[26],"two":[27,43],"major":[28],"differences,":[29],"non-volatility":[30,68],"and":[31,39,51,67,70,88,101],"write":[32],"overhead":[33],"in":[34],"terms":[35],"of":[36,77,96,105,119],"endurance,":[37],"latency":[38,66],"power.":[40],"We":[41,84],"built":[42],"different":[44],"FPGA-based":[45],"evaluation":[46],"boards":[47],"evaluate":[49],"hardware":[50],"software":[52,109],"designs":[53,123],"new-memory":[55],"based":[56],"memory;":[58],"one":[59],"with":[60,73],"a":[61,128],"subsystem":[63],"having":[64],"parameterizable":[65],"emulation,":[69],"other":[72],"real":[75],"chips":[76],"namely":[80],"phase-change":[81],"RAM":[82],"(PRAM).":[83],"experimented":[85],"primitive":[86],"functions":[87],"SQLite-based":[89],"benchmarks":[90],"on":[91,108,124,127],"Linux,":[92],"verifying":[93],"workings":[95],"functionalities,":[98],"e.g.,":[99],"nonvolatility":[100],"evaluating":[102],"impacts":[104],"performance.":[110],"In":[111],"our":[112],"experiments,":[113],"we":[114],"also":[115],"demonstrated":[116],"impact":[118],"memory-aware":[121],"software/hardware":[122],"program":[125],"performance":[126],"DRAM/PRAM":[129],"hybrid":[130]},"counts_by_year":[{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":6},{"year":2016,"cited_by_count":7},{"year":2015,"cited_by_count":4}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}