{"id":"https://openalex.org/W1990355199","doi":"https://doi.org/10.1109/rsp.2013.6683956","title":"BaBaNoC: An asynchronous network-on-chip described in Balsa","display_name":"BaBaNoC: An asynchronous network-on-chip described in Balsa","publication_year":2013,"publication_date":"2013-10-01","ids":{"openalex":"https://openalex.org/W1990355199","doi":"https://doi.org/10.1109/rsp.2013.6683956","mag":"1990355199"},"language":"en","primary_location":{"id":"doi:10.1109/rsp.2013.6683956","is_oa":false,"landing_page_url":"https://doi.org/10.1109/rsp.2013.6683956","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 International Symposium on Rapid System Prototyping (RSP)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101963901","display_name":"Matheus T. Moreira","orcid":"https://orcid.org/0000-0001-5030-9215"},"institutions":[{"id":"https://openalex.org/I45643870","display_name":"Pontif\u00edcia Universidade Cat\u00f3lica do Rio Grande do Sul","ror":"https://ror.org/025vmq686","country_code":"BR","type":"education","lineage":["https://openalex.org/I45643870"]}],"countries":["BR"],"is_corresponding":true,"raw_author_name":"Matheus T. Moreira","raw_affiliation_strings":["Faculty of Computer Science, Pontifical Catholic University of Rio Grande do Sul - PUCRS, Porto Alegre, Brazil","Fac. of Comput. Sci., Pontifical Catholic Univ. of Rio Grande do Sul, Porto Alegre, Brazil"],"affiliations":[{"raw_affiliation_string":"Faculty of Computer Science, Pontifical Catholic University of Rio Grande do Sul - PUCRS, Porto Alegre, Brazil","institution_ids":["https://openalex.org/I45643870"]},{"raw_affiliation_string":"Fac. of Comput. Sci., Pontifical Catholic Univ. of Rio Grande do Sul, Porto Alegre, Brazil","institution_ids":["https://openalex.org/I45643870"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055509031","display_name":"Felipe G\u00f6hring de Magalh\u00e3es","orcid":"https://orcid.org/0000-0002-0766-1421"},"institutions":[{"id":"https://openalex.org/I45643870","display_name":"Pontif\u00edcia Universidade Cat\u00f3lica do Rio Grande do Sul","ror":"https://ror.org/025vmq686","country_code":"BR","type":"education","lineage":["https://openalex.org/I45643870"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Felipe G. Magalhaes","raw_affiliation_strings":["Faculty of Computer Science, Pontifical Catholic University of Rio Grande do Sul - PUCRS, Porto Alegre, Brazil","Fac. of Comput. Sci., Pontifical Catholic Univ. of Rio Grande do Sul, Porto Alegre, Brazil"],"affiliations":[{"raw_affiliation_string":"Faculty of Computer Science, Pontifical Catholic University of Rio Grande do Sul - PUCRS, Porto Alegre, Brazil","institution_ids":["https://openalex.org/I45643870"]},{"raw_affiliation_string":"Fac. of Comput. Sci., Pontifical Catholic Univ. of Rio Grande do Sul, Porto Alegre, Brazil","institution_ids":["https://openalex.org/I45643870"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012661588","display_name":"Matheus Gibiluka","orcid":null},"institutions":[{"id":"https://openalex.org/I45643870","display_name":"Pontif\u00edcia Universidade Cat\u00f3lica do Rio Grande do Sul","ror":"https://ror.org/025vmq686","country_code":"BR","type":"education","lineage":["https://openalex.org/I45643870"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Matheus Gibiluka","raw_affiliation_strings":["Faculty of Computer Science, Pontifical Catholic University of Rio Grande do Sul - PUCRS, Porto Alegre, Brazil","Fac. of Comput. Sci., Pontifical Catholic Univ. of Rio Grande do Sul, Porto Alegre, Brazil"],"affiliations":[{"raw_affiliation_string":"Faculty of Computer Science, Pontifical Catholic University of Rio Grande do Sul - PUCRS, Porto Alegre, Brazil","institution_ids":["https://openalex.org/I45643870"]},{"raw_affiliation_string":"Fac. of Comput. Sci., Pontifical Catholic Univ. of Rio Grande do Sul, Porto Alegre, Brazil","institution_ids":["https://openalex.org/I45643870"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048898582","display_name":"Fabiano Hessel","orcid":"https://orcid.org/0000-0002-5473-9199"},"institutions":[{"id":"https://openalex.org/I45643870","display_name":"Pontif\u00edcia Universidade Cat\u00f3lica do Rio Grande do Sul","ror":"https://ror.org/025vmq686","country_code":"BR","type":"education","lineage":["https://openalex.org/I45643870"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Fabiano P. Hessel","raw_affiliation_strings":["Faculty of Computer Science, Pontifical Catholic University of Rio Grande do Sul - PUCRS, Porto Alegre, Brazil","Fac. of Comput. Sci., Pontifical Catholic Univ. of Rio Grande do Sul, Porto Alegre, Brazil"],"affiliations":[{"raw_affiliation_string":"Faculty of Computer Science, Pontifical Catholic University of Rio Grande do Sul - PUCRS, Porto Alegre, Brazil","institution_ids":["https://openalex.org/I45643870"]},{"raw_affiliation_string":"Fac. of Comput. Sci., Pontifical Catholic Univ. of Rio Grande do Sul, Porto Alegre, Brazil","institution_ids":["https://openalex.org/I45643870"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5072149252","display_name":"Ney Calazans","orcid":"https://orcid.org/0000-0002-0467-4294"},"institutions":[{"id":"https://openalex.org/I45643870","display_name":"Pontif\u00edcia Universidade Cat\u00f3lica do Rio Grande do Sul","ror":"https://ror.org/025vmq686","country_code":"BR","type":"education","lineage":["https://openalex.org/I45643870"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Ney L. V. Calazans","raw_affiliation_strings":["Faculty of Computer Science, Pontifical Catholic University of Rio Grande do Sul - PUCRS, Porto Alegre, Brazil","Fac. of Comput. Sci., Pontifical Catholic Univ. of Rio Grande do Sul, Porto Alegre, Brazil"],"affiliations":[{"raw_affiliation_string":"Faculty of Computer Science, Pontifical Catholic University of Rio Grande do Sul - PUCRS, Porto Alegre, Brazil","institution_ids":["https://openalex.org/I45643870"]},{"raw_affiliation_string":"Fac. of Comput. Sci., Pontifical Catholic Univ. of Rio Grande do Sul, Porto Alegre, Brazil","institution_ids":["https://openalex.org/I45643870"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5101963901"],"corresponding_institution_ids":["https://openalex.org/I45643870"],"apc_list":null,"apc_paid":null,"fwci":0.38,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.64848265,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"6448","issue":null,"first_page":"37","last_page":"43"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.8119533061981201},{"id":"https://openalex.org/keywords/mpsoc","display_name":"MPSoC","score":0.7842251062393188},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7813562154769897},{"id":"https://openalex.org/keywords/router","display_name":"Router","score":0.7108970880508423},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.6974366903305054},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.6484513282775879},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.5789299607276917},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5229314565658569},{"id":"https://openalex.org/keywords/modularity","display_name":"Modularity (biology)","score":0.5069706439971924},{"id":"https://openalex.org/keywords/emulation","display_name":"Emulation","score":0.456760436296463},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.4364296793937683},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.41481760144233704},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.2535220980644226},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.17105984687805176}],"concepts":[{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.8119533061981201},{"id":"https://openalex.org/C2777187653","wikidata":"https://www.wikidata.org/wiki/Q975106","display_name":"MPSoC","level":3,"score":0.7842251062393188},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7813562154769897},{"id":"https://openalex.org/C2775896111","wikidata":"https://www.wikidata.org/wiki/Q642560","display_name":"Router","level":2,"score":0.7108970880508423},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.6974366903305054},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.6484513282775879},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.5789299607276917},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5229314565658569},{"id":"https://openalex.org/C2779478453","wikidata":"https://www.wikidata.org/wiki/Q6889748","display_name":"Modularity (biology)","level":2,"score":0.5069706439971924},{"id":"https://openalex.org/C149810388","wikidata":"https://www.wikidata.org/wiki/Q5374873","display_name":"Emulation","level":2,"score":0.456760436296463},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.4364296793937683},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.41481760144233704},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.2535220980644226},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.17105984687805176},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C54355233","wikidata":"https://www.wikidata.org/wiki/Q7162","display_name":"Genetics","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C50522688","wikidata":"https://www.wikidata.org/wiki/Q189833","display_name":"Economic growth","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/rsp.2013.6683956","is_oa":false,"landing_page_url":"https://doi.org/10.1109/rsp.2013.6683956","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 International Symposium on Rapid System Prototyping (RSP)","raw_type":"proceedings-article"},{"id":"pmh:oai:publications.polymtl.ca:59611","is_oa":false,"landing_page_url":"https://publications.polymtl.ca/59611/","pdf_url":null,"source":{"id":"https://openalex.org/S4306401013","display_name":"PolyPublie (\u00c9cole Polytechnique de Montr\u00e9al)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I45683168","host_organization_name":"Polytechnique Montr\u00e9al","host_organization_lineage":["https://openalex.org/I45683168"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Communication de conf\u00e9rence"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.6499999761581421,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1489365096","https://openalex.org/W1498980146","https://openalex.org/W1609287256","https://openalex.org/W1999082644","https://openalex.org/W2027363446","https://openalex.org/W2035024806","https://openalex.org/W2099474000","https://openalex.org/W2105665679","https://openalex.org/W2139882509","https://openalex.org/W2150872535","https://openalex.org/W2152099665","https://openalex.org/W2168082067","https://openalex.org/W2170654632","https://openalex.org/W2487142227","https://openalex.org/W6629296023","https://openalex.org/W6630039347","https://openalex.org/W6675417064","https://openalex.org/W6680854182"],"related_works":["https://openalex.org/W2052816277","https://openalex.org/W2167988973","https://openalex.org/W1976012348","https://openalex.org/W2603824091","https://openalex.org/W2560375935","https://openalex.org/W2614713859","https://openalex.org/W2144357574","https://openalex.org/W4230458348","https://openalex.org/W1966325333","https://openalex.org/W3198758847"],"abstract_inverted_index":{"The":[0,95],"downscaling":[1],"of":[2,8,47,53,70],"silicon":[3],"technology":[4,38],"and":[5,27,81,93],"the":[6,45,51,66,90],"possibility":[7],"building":[9],"MPSoCs,":[10],"make":[11],"intrachip":[12],"communication":[13,25],"a":[14,42,83],"mainstream":[15],"research":[16],"topic.":[17],"NoCs":[18,29],"are":[19,30,73],"an":[20],"elegant":[21],"solution":[22],"to":[23,41,65],"provide":[24],"scalability":[26],"modularity.":[28],"already":[31],"common":[32],"in":[33,44],"MPSoC":[34],"design.":[35,77],"Moreover,":[36],"new":[37],"challenges":[39],"point":[40],"growth":[43],"use":[46],"non-synchronous":[48],"NoCs.":[49],"However,":[50],"design":[52,96],"asynchronous":[54,85],"infrastructures":[55],"with":[56],"current":[57],"EDA":[58],"tools":[59,72],"is":[60,63,97],"challenging.":[61],"That":[62],"due":[64],"fact":[67],"that":[68],"most":[69],"these":[71],"oriented":[74],"towards":[75],"synchronous":[76],"This":[78],"work":[79],"proposes":[80],"evaluates":[82],"fully":[84],"NoC":[86],"router":[87],"based":[88],"on":[89],"Balsa":[91],"language":[92],"framework.":[94],"validates":[98],"through":[99],"FPGA":[100],"synthesis.":[101]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2014,"cited_by_count":1}],"updated_date":"2026-03-20T23:20:44.827607","created_date":"2025-10-10T00:00:00"}
