{"id":"https://openalex.org/W2889390099","doi":"https://doi.org/10.1109/recosoc.2018.8449383","title":"Template architectures for highly scalable, many-core Heterogeneous SoC: Could-of-Chips","display_name":"Template architectures for highly scalable, many-core Heterogeneous SoC: Could-of-Chips","publication_year":2018,"publication_date":"2018-07-01","ids":{"openalex":"https://openalex.org/W2889390099","doi":"https://doi.org/10.1109/recosoc.2018.8449383","mag":"2889390099"},"language":"en","primary_location":{"id":"doi:10.1109/recosoc.2018.8449383","is_oa":false,"landing_page_url":"https://doi.org/10.1109/recosoc.2018.8449383","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 13th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5047767859","display_name":"Georgios Bousdras","orcid":null},"institutions":[{"id":"https://openalex.org/I132053463","display_name":"Universit\u00e9 Libre de Bruxelles","ror":"https://ror.org/01r9htc13","country_code":"BE","type":"education","lineage":["https://openalex.org/I132053463"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Georgios Bousdras","raw_affiliation_strings":["BEAMS Department, Universit\u00e9 libre de Bruxelles, Brussels, Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"BEAMS Department, Universit\u00e9 libre de Bruxelles, Brussels, Belgium","institution_ids":["https://openalex.org/I132053463"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002666061","display_name":"Fran\u00e7ois Quitin","orcid":"https://orcid.org/0000-0001-9720-9879"},"institutions":[{"id":"https://openalex.org/I132053463","display_name":"Universit\u00e9 Libre de Bruxelles","ror":"https://ror.org/01r9htc13","country_code":"BE","type":"education","lineage":["https://openalex.org/I132053463"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Francois Quitin","raw_affiliation_strings":["BEAMS Department, Universit\u00e9 libre de Bruxelles, Brussels, Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"BEAMS Department, Universit\u00e9 libre de Bruxelles, Brussels, Belgium","institution_ids":["https://openalex.org/I132053463"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5056611420","display_name":"Dragomir Milojevic","orcid":"https://orcid.org/0000-0001-5915-5160"},"institutions":[{"id":"https://openalex.org/I132053463","display_name":"Universit\u00e9 Libre de Bruxelles","ror":"https://ror.org/01r9htc13","country_code":"BE","type":"education","lineage":["https://openalex.org/I132053463"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Dragomir Milojevic","raw_affiliation_strings":["BEAMS Department, Universit\u00e9 libre de Bruxelles, Brussels, Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"BEAMS Department, Universit\u00e9 libre de Bruxelles, Brussels, Belgium","institution_ids":["https://openalex.org/I132053463"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I132053463"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"39","issue":null,"first_page":"1","last_page":"7"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7284592390060425},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.6901487112045288},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6567139625549316},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5719830393791199},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.44223397970199585},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.43819770216941833},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.42784419655799866},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16053637862205505},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.1437668800354004},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.12716984748840332}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7284592390060425},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.6901487112045288},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6567139625549316},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5719830393791199},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.44223397970199585},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.43819770216941833},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.42784419655799866},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16053637862205505},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.1437668800354004},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.12716984748840332}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/recosoc.2018.8449383","is_oa":false,"landing_page_url":"https://doi.org/10.1109/recosoc.2018.8449383","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 13th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)","raw_type":"proceedings-article"},{"id":"pmh:oai:dipot.ulb.ac.be:2013/279091","is_oa":false,"landing_page_url":"http://hdl.handle.net/2013/ULB-DIPOT:oai:dipot.ulb.ac.be:2013/279091","pdf_url":null,"source":{"id":"https://openalex.org/S4306401063","display_name":"D\u00e9p\u00f4t institutionnel de l'Universit\u00e9 libre de Bruxelles (Universit\u00e9 Libre de Bruxelles)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I132053463","host_organization_name":"Universit\u00e9 Libre de Bruxelles","host_organization_lineage":["https://openalex.org/I132053463"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"In: 13th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)","raw_type":"info:eu-repo/semantics/conferencePaper"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.5199999809265137}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W1859184552","https://openalex.org/W2000410219","https://openalex.org/W2027390683","https://openalex.org/W2068187310","https://openalex.org/W2078656666","https://openalex.org/W2080683350","https://openalex.org/W2092212481","https://openalex.org/W2117466455","https://openalex.org/W2142453689","https://openalex.org/W2147657366","https://openalex.org/W2152715401","https://openalex.org/W2157225945","https://openalex.org/W2165388927","https://openalex.org/W2176265295","https://openalex.org/W2234584938","https://openalex.org/W2329307070","https://openalex.org/W2499596257","https://openalex.org/W2593214130","https://openalex.org/W2593535610","https://openalex.org/W2778483589","https://openalex.org/W3140195045"],"related_works":["https://openalex.org/W2036806516","https://openalex.org/W1967394420","https://openalex.org/W2565425548","https://openalex.org/W2392009442","https://openalex.org/W2100663632","https://openalex.org/W2154106283","https://openalex.org/W2912613323","https://openalex.org/W2031621863","https://openalex.org/W3142211975","https://openalex.org/W2353292666"],"abstract_inverted_index":{"Heterogeneous":[0],"Multi-Processor":[1],"Systems-on-Chip":[2],"(HMPSoC)":[3],"are":[4,63],"designed":[5],"to":[6,15,18,97,139],"support":[7],"a":[8,69,108,119,145,180],"wide":[9],"variety":[10],"of":[11,27,48,56,59,111,159,196,207,218],"applications":[12],"and":[13,30,41,86,122,134,172,175],"need":[14,96],"be":[16,186],"scalable":[17,121],"meet":[19],"the":[20,25,46,60,91,167,205],"different":[21,141],"power/performance":[22],"requirements.":[23],"However,":[24],"amount":[26],"processing":[28],"units":[29],"other":[31],"mandatory":[32],"resources":[33],"such":[34,49,131],"as":[35,65,132],"memory,":[36],"analogue":[37],"blocks,":[38],"existing":[39],"hard":[40],"soft":[42],"IP":[43],"blocks":[44],"make":[45],"design":[47,113,154],"systems":[50],"an":[51],"extremely":[52],"tedious":[53],"task.":[54],"As":[55],"today":[57],"most":[58],"HMPSoC":[61,124],"architectures":[62,152],"implemented":[64],"integrated":[66],"circuits":[67],"using":[68,126,170],"single":[70,146],"CMOS":[71,93,142],"technology":[72,94],"(i.e.":[73],"homogeneous":[74],"IC":[75,128,147,163],"manufacturing":[76],"process).":[77],"This":[78],"often":[79],"results":[80],"inefficiencies":[81],"in":[82],"Power,":[83],"Performance,":[84],"Area":[85],"thus":[87],"Cost":[88],"(PPAC),":[89],"since":[90],"unique":[92],"will":[95],"compromise":[98],"many":[99],"orthogonal":[100],"optimization":[101],"objectives.":[102],"In":[103],"this":[104],"paper":[105],"we":[106,115],"propose":[107],"new":[109],"concept":[110,206,217],"system":[112,160,168,189],"that":[114,137,184],"call":[116],"Cloud-of-Chips":[117],"(CoC):":[118],"highly":[120],"cost-efficient":[123],"architecture":[125],"advanced":[127],"packaging":[129],"technologies":[130],"2.5":[133],"3D":[135,173],"integration":[136],"allows":[138],"mix":[140],"processes":[143],"into":[144],"package.":[148],"Further,":[149],"CoC":[150,200],"based":[151],"allow":[153],"configurability":[155],"at":[156,162,176,188,193],"various":[157],"steps":[158],"integration:":[161],"design-time,":[164],"so":[165],"during":[166,197],"assembly,":[169],"chiplets":[171],"stacking;":[174],"run-time":[177],"by":[178],"adding":[179],"software":[181,198,208],"configurable":[182],"layer":[183],"can":[185],"used":[187],"assembly":[190],"step":[191],"(e.g.":[192],"PCB":[194],"level)":[195],"execution.":[199],"paradigm":[201],"relies":[202],"heavily":[203,212],"on":[204],"controlled":[209],"hierarchical":[210],"interconnect,":[211],"inspired":[213],"from":[214],"already":[215],"proven":[216],"Software":[219],"Defined":[220],"Networks.":[221]},"counts_by_year":[{"year":2021,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
