{"id":"https://openalex.org/W1536386756","doi":"https://doi.org/10.1109/recosoc.2015.7238105","title":"Using the reconfigurability of modern FPGAs for highly efficient PUF-based key generation","display_name":"Using the reconfigurability of modern FPGAs for highly efficient PUF-based key generation","publication_year":2015,"publication_date":"2015-06-01","ids":{"openalex":"https://openalex.org/W1536386756","doi":"https://doi.org/10.1109/recosoc.2015.7238105","mag":"1536386756"},"language":"en","primary_location":{"id":"doi:10.1109/recosoc.2015.7238105","is_oa":false,"landing_page_url":"https://doi.org/10.1109/recosoc.2015.7238105","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5048062862","display_name":"Stefan Gehrer","orcid":"https://orcid.org/0000-0002-8052-7130"},"institutions":[{"id":"https://openalex.org/I2802768257","display_name":"Robert Bosch Hospital","ror":"https://ror.org/034nkkr84","country_code":"DE","type":"healthcare","lineage":["https://openalex.org/I2802101015","https://openalex.org/I2802768257","https://openalex.org/I4403386655"]},{"id":"https://openalex.org/I889804353","display_name":"Robert Bosch (Germany)","ror":"https://ror.org/01fe0jt45","country_code":"DE","type":"company","lineage":["https://openalex.org/I889804353"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Stefan Gehrer","raw_affiliation_strings":["Robert Bosch GmbH, Stuttgart, Germany","Robert Bosch GmbH Stuttgart Germany"],"affiliations":[{"raw_affiliation_string":"Robert Bosch GmbH, Stuttgart, Germany","institution_ids":["https://openalex.org/I889804353"]},{"raw_affiliation_string":"Robert Bosch GmbH Stuttgart Germany","institution_ids":["https://openalex.org/I2802768257"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5026512033","display_name":"Georg Sigl","orcid":"https://orcid.org/0000-0003-3152-941X"},"institutions":[{"id":"https://openalex.org/I62916508","display_name":"Technical University of Munich","ror":"https://ror.org/02kkvpp62","country_code":"DE","type":"education","lineage":["https://openalex.org/I62916508"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Georg Sigl","raw_affiliation_strings":["Institute for Security in Information Technology, Technische Universit\u00e4t, Munich, Germany","Institute for Security in Information Technology, Technische Universit\u00e4t M\u00fcnchen, Munich, Germany#TAB#"],"affiliations":[{"raw_affiliation_string":"Institute for Security in Information Technology, Technische Universit\u00e4t, Munich, Germany","institution_ids":[]},{"raw_affiliation_string":"Institute for Security in Information Technology, Technische Universit\u00e4t M\u00fcnchen, Munich, Germany#TAB#","institution_ids":["https://openalex.org/I62916508"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5048062862"],"corresponding_institution_ids":["https://openalex.org/I2802768257","https://openalex.org/I889804353"],"apc_list":null,"apc_paid":null,"fwci":1.3194,"has_fulltext":false,"cited_by_count":15,"citation_normalized_percentile":{"value":0.79237765,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9879999756813049,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12859","display_name":"Cell Image Analysis Techniques","score":0.9789999723434448,"subfield":{"id":"https://openalex.org/subfields/1304","display_name":"Biophysics"},"field":{"id":"https://openalex.org/fields/13","display_name":"Biochemistry, Genetics and Molecular Biology"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reconfigurability","display_name":"Reconfigurability","score":0.901244044303894},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8725792765617371},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.6979572176933289},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6916627287864685},{"id":"https://openalex.org/keywords/logic-block","display_name":"Logic block","score":0.6501412987709045},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6487762928009033},{"id":"https://openalex.org/keywords/cryptography","display_name":"Cryptography","score":0.5805262327194214},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.5548626780509949},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.529324471950531},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.5238720774650574},{"id":"https://openalex.org/keywords/physical-unclonable-function","display_name":"Physical unclonable function","score":0.5123327970504761},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.47264236211776733},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.4666360020637512},{"id":"https://openalex.org/keywords/programmable-logic-device","display_name":"Programmable logic device","score":0.4481455981731415},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.4372381567955017},{"id":"https://openalex.org/keywords/key-generation","display_name":"Key generation","score":0.4115999937057495},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.3369928002357483},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.07647120952606201}],"concepts":[{"id":"https://openalex.org/C2780149590","wikidata":"https://www.wikidata.org/wiki/Q7302742","display_name":"Reconfigurability","level":2,"score":0.901244044303894},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8725792765617371},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.6979572176933289},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6916627287864685},{"id":"https://openalex.org/C2778325283","wikidata":"https://www.wikidata.org/wiki/Q1125244","display_name":"Logic block","level":3,"score":0.6501412987709045},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6487762928009033},{"id":"https://openalex.org/C178489894","wikidata":"https://www.wikidata.org/wiki/Q8789","display_name":"Cryptography","level":2,"score":0.5805262327194214},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.5548626780509949},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.529324471950531},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.5238720774650574},{"id":"https://openalex.org/C8643368","wikidata":"https://www.wikidata.org/wiki/Q4046262","display_name":"Physical unclonable function","level":3,"score":0.5123327970504761},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.47264236211776733},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.4666360020637512},{"id":"https://openalex.org/C206274596","wikidata":"https://www.wikidata.org/wiki/Q1063837","display_name":"Programmable logic device","level":2,"score":0.4481455981731415},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.4372381567955017},{"id":"https://openalex.org/C163173736","wikidata":"https://www.wikidata.org/wiki/Q3308558","display_name":"Key generation","level":3,"score":0.4115999937057495},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.3369928002357483},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.07647120952606201},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/recosoc.2015.7238105","is_oa":false,"landing_page_url":"https://doi.org/10.1109/recosoc.2015.7238105","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 10th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W600520643","https://openalex.org/W1537073697","https://openalex.org/W1998306333","https://openalex.org/W2000171858","https://openalex.org/W2006550815","https://openalex.org/W2070196900","https://openalex.org/W2113322447","https://openalex.org/W2116374153","https://openalex.org/W2135064681","https://openalex.org/W2138874069","https://openalex.org/W2147784592","https://openalex.org/W2151759197","https://openalex.org/W2163294786","https://openalex.org/W2169212403","https://openalex.org/W2174648984","https://openalex.org/W2489262679","https://openalex.org/W2534919326","https://openalex.org/W2556738576","https://openalex.org/W3104314953","https://openalex.org/W6685649096","https://openalex.org/W6785218716"],"related_works":["https://openalex.org/W3209932692","https://openalex.org/W2976888033","https://openalex.org/W2135636985","https://openalex.org/W2150843699","https://openalex.org/W4387129757","https://openalex.org/W2971718024","https://openalex.org/W2373258662","https://openalex.org/W3023652529","https://openalex.org/W2526756620","https://openalex.org/W3012528295"],"abstract_inverted_index":{"Physically":[0],"Unclonable":[1],"Functions":[2],"(PUFs)":[3],"are":[4,72,115],"a":[5,26,118,128,145,149,156],"modern":[6],"way":[7],"to":[8,29,117,126,138,143,165,187],"generate":[9,127,144],"intrinsic":[10],"keys":[11],"by":[12,109,152],"using":[13],"the":[14,31,65,75,79,85,100,140,167,170,181,185,189],"production":[15],"tolerances":[16],"of":[17,34,43,70,78,82,113,169,184],"Integrated":[18],"Circuits":[19],"(ICs).":[20],"In":[21],"this":[22,61],"paper":[23],"we":[24],"present":[25,132],"new":[27],"method":[28],"increase":[30,188],"area":[32,77],"efficiency":[33],"PUF":[35,146],"implementations":[36,69],"on":[37,48,74,89,155],"FPGA-based":[38],"SoCs.":[39],"The":[40,159,172],"complex":[41],"system":[42,162],"logic":[44,87,95],"and":[45,96,178],"routing":[46,97],"resources":[47,98,142],"FPGAs":[49],"is":[50,107,136,163,175],"analyzed":[51],"for":[52,58],"their":[53],"usability":[54],"as":[55],"entropy":[56],"sources":[57],"PUFs":[59,71],"in":[60],"work.":[62],"To":[63],"maximize":[64],"resource":[66],"usage,":[67],"different":[68,94],"reconfigured":[73],"same":[76,86],"FPGA.":[80,171],"Each":[81],"them":[83,114],"occupies":[84],"block":[88],"an":[90,133],"FPGA,":[91],"but":[92],"uses":[93],"inside":[99,180],"block.":[101],"A":[102],"partial":[103],"bit":[104],"vector":[105,121],"response":[106,120,147],"generated":[108,177],"each":[110],"implementation.":[111],"All":[112],"joined":[116],"larger":[119],"that":[122,135],"can":[123],"be":[124],"used":[125,164],"cryptographic":[129],"key.":[130],"We":[131],"implementation":[134],"able":[137],"decrease":[139],"required":[141],"with":[148],"given":[150],"length":[151],"almost":[153],"98%":[154],"Xilinx":[157],"Zynq.":[158],"ARM":[160],"processor":[161],"control":[166],"reconfiguration":[168],"key":[173],"itself":[174],"exclusively":[176],"kept":[179],"FPGA":[182],"part":[183],"SoC":[186],"security.":[190]},"counts_by_year":[{"year":2022,"cited_by_count":5},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":3},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":1}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}
