{"id":"https://openalex.org/W2028426157","doi":"https://doi.org/10.1109/recosoc.2013.6581529","title":"Exploiting FPGA block memories for protected cryptographic implementations","display_name":"Exploiting FPGA block memories for protected cryptographic implementations","publication_year":2013,"publication_date":"2013-07-01","ids":{"openalex":"https://openalex.org/W2028426157","doi":"https://doi.org/10.1109/recosoc.2013.6581529","mag":"2028426157"},"language":"en","primary_location":{"id":"doi:10.1109/recosoc.2013.6581529","is_oa":false,"landing_page_url":"https://doi.org/10.1109/recosoc.2013.6581529","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5081720773","display_name":"Shivam Bhasin","orcid":"https://orcid.org/0000-0002-6903-5127"},"institutions":[{"id":"https://openalex.org/I205703379","display_name":"Institut Mines-T\u00e9l\u00e9com","ror":"https://ror.org/025vp2923","country_code":"FR","type":"facility","lineage":["https://openalex.org/I205703379"]},{"id":"https://openalex.org/I12356871","display_name":"T\u00e9l\u00e9com Paris","ror":"https://ror.org/01naq7912","country_code":"FR","type":"education","lineage":["https://openalex.org/I12356871","https://openalex.org/I205703379","https://openalex.org/I4210145102"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"Shivam Bhasin","raw_affiliation_strings":["Institut MINES-TELECOM, Telecom Paris Tech, Paris, France","Inst. Mines Telecom, Telecom ParisTech, Paris, France"],"affiliations":[{"raw_affiliation_string":"Institut MINES-TELECOM, Telecom Paris Tech, Paris, France","institution_ids":["https://openalex.org/I205703379","https://openalex.org/I12356871"]},{"raw_affiliation_string":"Inst. Mines Telecom, Telecom ParisTech, Paris, France","institution_ids":["https://openalex.org/I12356871"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002326941","display_name":"Wei He","orcid":"https://orcid.org/0000-0002-2628-8028"},"institutions":[{"id":"https://openalex.org/I88060688","display_name":"Universidad Polit\u00e9cnica de Madrid","ror":"https://ror.org/03n6nwv02","country_code":"ES","type":"education","lineage":["https://openalex.org/I88060688"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Wei He","raw_affiliation_strings":["Centro de Electronica Industrial, Universidad Politecnica de Madrid, Madrid, Spain","Centro de Electron. Ind., Univ. Politec. de Madrid, Madrid, Spain"],"affiliations":[{"raw_affiliation_string":"Centro de Electronica Industrial, Universidad Politecnica de Madrid, Madrid, Spain","institution_ids":["https://openalex.org/I88060688"]},{"raw_affiliation_string":"Centro de Electron. Ind., Univ. Politec. de Madrid, Madrid, Spain","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008439372","display_name":"Sylvain Guilley","orcid":"https://orcid.org/0000-0002-5044-3534"},"institutions":[{"id":"https://openalex.org/I12356871","display_name":"T\u00e9l\u00e9com Paris","ror":"https://ror.org/01naq7912","country_code":"FR","type":"education","lineage":["https://openalex.org/I12356871","https://openalex.org/I205703379","https://openalex.org/I4210145102"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Sylvain Guilley","raw_affiliation_strings":["TELECOM ParisTech, Paris, \u00c3\u017dle-de-France, FR","Inst. Mines Telecom, Telecom ParisTech, Paris, France"],"affiliations":[{"raw_affiliation_string":"TELECOM ParisTech, Paris, \u00c3\u017dle-de-France, FR","institution_ids":["https://openalex.org/I12356871"]},{"raw_affiliation_string":"Inst. Mines Telecom, Telecom ParisTech, Paris, France","institution_ids":["https://openalex.org/I12356871"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5054213189","display_name":"Jean\u2010Luc Danger","orcid":"https://orcid.org/0000-0001-5063-7964"},"institutions":[{"id":"https://openalex.org/I12356871","display_name":"T\u00e9l\u00e9com Paris","ror":"https://ror.org/01naq7912","country_code":"FR","type":"education","lineage":["https://openalex.org/I12356871","https://openalex.org/I205703379","https://openalex.org/I4210145102"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Jean-Luc Danger","raw_affiliation_strings":["TELECOM ParisTech, Paris, \u00c3\u017dle-de-France, FR","Inst. Mines Telecom, Telecom ParisTech, Paris, France"],"affiliations":[{"raw_affiliation_string":"TELECOM ParisTech, Paris, \u00c3\u017dle-de-France, FR","institution_ids":["https://openalex.org/I12356871"]},{"raw_affiliation_string":"Inst. Mines Telecom, Telecom ParisTech, Paris, France","institution_ids":["https://openalex.org/I12356871"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5081720773"],"corresponding_institution_ids":["https://openalex.org/I12356871","https://openalex.org/I205703379"],"apc_list":null,"apc_paid":null,"fwci":4.3281,"has_fulltext":false,"cited_by_count":13,"citation_normalized_percentile":{"value":0.94180759,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11017","display_name":"Chaos-based Image/Signal Encryption","score":0.9968000054359436,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7905007600784302},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6983593702316284},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6921534538269043},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.5322954654693604},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.47935301065444946},{"id":"https://openalex.org/keywords/countermeasure","display_name":"Countermeasure","score":0.4702906608581543},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.46983879804611206},{"id":"https://openalex.org/keywords/cryptography","display_name":"Cryptography","score":0.4487551152706146},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3589644432067871},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12356683611869812},{"id":"https://openalex.org/keywords/computer-security","display_name":"Computer security","score":0.10407128930091858}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7905007600784302},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6983593702316284},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6921534538269043},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.5322954654693604},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.47935301065444946},{"id":"https://openalex.org/C21593369","wikidata":"https://www.wikidata.org/wiki/Q1032176","display_name":"Countermeasure","level":2,"score":0.4702906608581543},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.46983879804611206},{"id":"https://openalex.org/C178489894","wikidata":"https://www.wikidata.org/wiki/Q8789","display_name":"Cryptography","level":2,"score":0.4487551152706146},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3589644432067871},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12356683611869812},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.10407128930091858},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C146978453","wikidata":"https://www.wikidata.org/wiki/Q3798668","display_name":"Aerospace engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/recosoc.2013.6581529","is_oa":false,"landing_page_url":"https://doi.org/10.1109/recosoc.2013.6581529","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W154633427","https://openalex.org/W1494911169","https://openalex.org/W1548656471","https://openalex.org/W1562542037","https://openalex.org/W1580211761","https://openalex.org/W1748081333","https://openalex.org/W1763691640","https://openalex.org/W1897761346","https://openalex.org/W1966551903","https://openalex.org/W1984961420","https://openalex.org/W1985537414","https://openalex.org/W2052900991","https://openalex.org/W2096434182","https://openalex.org/W2098729405","https://openalex.org/W2101912677","https://openalex.org/W2144630005","https://openalex.org/W4231098049","https://openalex.org/W4296927913","https://openalex.org/W6632802591","https://openalex.org/W6634445971","https://openalex.org/W6637582306","https://openalex.org/W6637828307","https://openalex.org/W6639699525","https://openalex.org/W7032981850"],"related_works":["https://openalex.org/W2378749186","https://openalex.org/W2364088131","https://openalex.org/W2362741838","https://openalex.org/W622044715","https://openalex.org/W2378994067","https://openalex.org/W2347979151","https://openalex.org/W1485756991","https://openalex.org/W2376218453","https://openalex.org/W2984236338","https://openalex.org/W1499106549"],"abstract_inverted_index":{"Modern":[0],"Field":[1],"Programmable":[2],"Gate":[3],"Arrays":[4],"(FPGAs)":[5],"are":[6,40,136,193],"power":[7],"packed":[8],"with":[9],"features":[10,16,87],"to":[11,91,103,117,177,195],"facilitate":[12],"designers.":[13],"Availability":[14],"of":[15,33,53,161],"like":[17,121],"huge":[18],"block":[19],"memory":[20],"(BRAM),":[21],"Digital":[22],"Signal":[23],"Processing":[24],"(DSP)":[25],"cores,":[26],"embedded":[27],"CPU":[28],"makes":[29],"the":[30,72,105,179,184,188,197],"design":[31,67,92],"strategy":[32,73],"FPGAs":[34,108],"quite":[35],"different":[36,80],"from":[37,81],"ASICs.":[38],"FPGA":[39,75],"also":[41,78],"widely":[42],"used":[43,116],"in":[44,83,107,183],"security-critical":[45],"application":[46],"where":[47],"protection":[48],"against":[49,69],"known":[50],"attacks":[51,61],"is":[52],"prime":[54],"importance.":[55],"We":[56],"focus":[57],"ourselves":[58],"on":[59,138,150,166],"physical":[60,64],"which":[62,126],"target":[63],"implementations.":[65],"To":[66],"countermeasures":[68,120],"such":[70],"attacks,":[71],"for":[74,109,145,199],"designers":[76],"should":[77,88],"be":[79,89,115],"that":[82],"ASIC.":[84],"The":[85,134,154],"available":[86],"exploited":[90],"compact":[93,111],"and":[94,123,143,148,201],"strong":[95],"countermeasures.":[96,112],"In":[97],"this":[98],"paper,":[99],"we":[100],"propose":[101],"methods":[102],"exploit":[104],"BRAMs":[106],"designing":[110],"BRAM":[113],"can":[114],"optimize":[118],"intrinsic":[119],"masking":[122,156],"dual-rail":[124],"logic,":[125],"otherwise":[127],"have":[128],"significant":[129],"overhead":[130,147,160],"(at":[131],"least":[132],"2X).":[133],"optimizations":[135],"applied":[137,165],"a":[139],"real":[140],"AES-128":[141],"co-processor":[142],"tested":[144],"area":[146,200],"resistance":[149],"Xilinx":[151],"Virtex-5":[152],"chips.":[153],"presented":[155],"countermeasure":[157,173],"has":[158,174],"an":[159],"only":[162],"16%":[163],"when":[164],"AES.":[167],"Moreover":[168],"Dual-rail":[169],"Precharge":[170],"Logic":[171],"(DPL)":[172],"been":[175],"optimized":[176],"pack":[178],"whole":[180],"sequential":[181],"part":[182],"BRAM,":[185],"hence":[186],"enhancing":[187],"security.":[189,202],"Proper":[190],"robustness":[191],"evaluations":[192],"conducted":[194],"analyze":[196],"optimization":[198]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":7}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}