{"id":"https://openalex.org/W1980085932","doi":"https://doi.org/10.1109/recosoc.2011.5981530","title":"Simulations of NoC topologies for generalized hierarchical completely-connected networks","display_name":"Simulations of NoC topologies for generalized hierarchical completely-connected networks","publication_year":2011,"publication_date":"2011-06-01","ids":{"openalex":"https://openalex.org/W1980085932","doi":"https://doi.org/10.1109/recosoc.2011.5981530","mag":"1980085932"},"language":"en","primary_location":{"id":"doi:10.1109/recosoc.2011.5981530","is_oa":false,"landing_page_url":"https://doi.org/10.1109/recosoc.2011.5981530","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5045230650","display_name":"Toshinori Takabatake","orcid":null},"institutions":[{"id":"https://openalex.org/I197425175","display_name":"Shonan Institute of Technology","ror":"https://ror.org/01bawqf59","country_code":"JP","type":"education","lineage":["https://openalex.org/I197425175"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Toshinori Takabatake","raw_affiliation_strings":["Department of Information Science, Shonan Institute of Technology, Fujisawa, Kanagawa, Japan","Department of Information Science, Shonan Institute of Technology, Fujisawa, Kanagawa 251-8511, Japan"],"affiliations":[{"raw_affiliation_string":"Department of Information Science, Shonan Institute of Technology, Fujisawa, Kanagawa, Japan","institution_ids":["https://openalex.org/I197425175"]},{"raw_affiliation_string":"Department of Information Science, Shonan Institute of Technology, Fujisawa, Kanagawa 251-8511, Japan","institution_ids":["https://openalex.org/I197425175"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5045230650"],"corresponding_institution_ids":["https://openalex.org/I197425175"],"apc_list":null,"apc_paid":null,"fwci":0.3501,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.60030092,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"2","issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10179","display_name":"Supercapacitor Materials and Fabrication","score":0.992900013923645,"subfield":{"id":"https://openalex.org/subfields/2504","display_name":"Electronic, Optical and Magnetic Materials"},"field":{"id":"https://openalex.org/fields/25","display_name":"Materials Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9900000095367432,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/network-topology","display_name":"Network topology","score":0.891502320766449},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.7936902046203613},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.5887198448181152},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5817646980285645},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5208626389503479},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5013165473937988},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.4790121912956238},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.4597153663635254},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.45627087354660034},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4026591181755066},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3234867453575134},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.31813710927963257},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.19962763786315918},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09441778063774109},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.08177939057350159}],"concepts":[{"id":"https://openalex.org/C199845137","wikidata":"https://www.wikidata.org/wiki/Q145490","display_name":"Network topology","level":2,"score":0.891502320766449},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.7936902046203613},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.5887198448181152},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5817646980285645},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5208626389503479},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5013165473937988},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.4790121912956238},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.4597153663635254},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.45627087354660034},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4026591181755066},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3234867453575134},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.31813710927963257},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.19962763786315918},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09441778063774109},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.08177939057350159}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/recosoc.2011.5981530","is_oa":false,"landing_page_url":"https://doi.org/10.1109/recosoc.2011.5981530","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W93786693","https://openalex.org/W419638019","https://openalex.org/W639608796","https://openalex.org/W1559789667","https://openalex.org/W2005262951","https://openalex.org/W2010073993","https://openalex.org/W2013729668","https://openalex.org/W2089637045","https://openalex.org/W2109343939","https://openalex.org/W2111553220","https://openalex.org/W2119677480","https://openalex.org/W2135711111","https://openalex.org/W2142364550","https://openalex.org/W2149935279","https://openalex.org/W2152150905","https://openalex.org/W2162360341","https://openalex.org/W2540500304","https://openalex.org/W6603777965","https://openalex.org/W6651698234","https://openalex.org/W6653488083","https://openalex.org/W6728718876"],"related_works":["https://openalex.org/W2081032080","https://openalex.org/W2134733504","https://openalex.org/W2144460576","https://openalex.org/W1980085932","https://openalex.org/W2594964164","https://openalex.org/W2030249421","https://openalex.org/W1966736993","https://openalex.org/W2022199660","https://openalex.org/W2547794540","https://openalex.org/W2161995522"],"abstract_inverted_index":{"The":[0,61,70],"density":[1],"of":[2,12,16,65,76,116,122,129,140],"integration":[3],"in":[4,33,74],"a":[5,22,34,49,53,105],"single":[6,35],"chip":[7,23],"has":[8,184],"progressed":[9],"by":[10,147,190],"use":[11],"the":[13,39,43,66,102,112,117,123,127,130,138,141,144,148,160,172,175,182,191],"deep":[14],"submicron":[15],"VLSI":[17],"design":[18],"rule.":[19],"Systems":[20],"on":[21,48],"(for":[24],"short,":[25],"SoCs),":[26],"i.e.,":[27,52],"several":[28],"functional":[29],"cores":[30,88],"being":[31],"integrated":[32],"chip,":[36],"have":[37],"become":[38],"mainstream":[40],"technology.":[41],"On":[42],"other":[44,176],"hand,":[45],"A":[46],"Network":[47],"Chip":[50],"(NoC),":[51],"communication-centric":[54],"platform,":[55],"offers":[56],"an":[57],"on-chip":[58,67],"interconnection":[59],"network.":[60],"NoC":[62,71,84,103,131,161,192],"is":[63,72,163,168],"one":[64],"communication":[68,145],"systems.":[69,80,132],"used":[73,110,189],"place":[75],"conventional":[77],"shared":[78],"bus":[79],"There":[81],"are":[82],"many":[83],"topologies":[85,124,142],"for":[86,111],"connecting":[87],"to":[89,170,187],"each":[90],"other,":[91],"such":[92],"as":[93,159],"Mesh,":[94],"Ring,":[95],"Spidergon,":[96],"and":[97,114],"so":[98],"on.":[99],"To":[100],"evaluate":[101],"topologies,":[104],"simulation":[106,149],"based":[107,150],"approach":[108],"was":[109],"modeling":[113],"analysis":[115],"topologies.":[118,177],"However,":[119],"some":[120],"properties":[121],"could":[125],"affect":[126],"performance":[128,186],"In":[133,152],"this":[134],"paper,":[135],"we":[136],"present":[137],"performances":[139],"about":[143],"aspects":[146],"approach.":[151],"particular,":[153],"Generalized":[154],"Hierarchical":[155],"Completely-Connected":[156],"Networks":[157],"(HCC)":[158],"topology":[162],"presented.":[164],"An":[165],"experimental":[166],"study":[167],"conducted":[169],"compare":[171],"HCC":[173,183],"with":[174],"Simulation":[178],"results":[179],"show":[180],"that":[181],"enough":[185],"be":[188],"topology.":[193]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}