{"id":"https://openalex.org/W2152733631","doi":"https://doi.org/10.1109/recosoc.2011.5981506","title":"Evaluation of speculative execution techniques for high-level language to hardware compilation","display_name":"Evaluation of speculative execution techniques for high-level language to hardware compilation","publication_year":2011,"publication_date":"2011-06-01","ids":{"openalex":"https://openalex.org/W2152733631","doi":"https://doi.org/10.1109/recosoc.2011.5981506","mag":"2152733631"},"language":"en","primary_location":{"id":"doi:10.1109/recosoc.2011.5981506","is_oa":false,"landing_page_url":"https://doi.org/10.1109/recosoc.2011.5981506","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5062200941","display_name":"Benjamin Thielmann","orcid":null},"institutions":[{"id":"https://openalex.org/I94509681","display_name":"Technische Universit\u00e4t Braunschweig","ror":"https://ror.org/010nsgg66","country_code":"DE","type":"education","lineage":["https://openalex.org/I94509681"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Benjamin Thielmann","raw_affiliation_strings":["Integrated Circuit Design (E.I.S.), Technische Universit\u00e4at Braunschweig, Germany"],"affiliations":[{"raw_affiliation_string":"Integrated Circuit Design (E.I.S.), Technische Universit\u00e4at Braunschweig, Germany","institution_ids":["https://openalex.org/I94509681"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5077213011","display_name":"Jens Huthmann","orcid":null},"institutions":[{"id":"https://openalex.org/I31512782","display_name":"Technical University of Darmstadt","ror":"https://ror.org/05n911h24","country_code":"DE","type":"education","lineage":["https://openalex.org/I31512782"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Jens Huthmann","raw_affiliation_strings":["Embedded Systems and Applications Group, Technische Universit\u00e4t Darmstadt, Germany"],"affiliations":[{"raw_affiliation_string":"Embedded Systems and Applications Group, Technische Universit\u00e4t Darmstadt, Germany","institution_ids":["https://openalex.org/I31512782"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5047000315","display_name":"Andreas Koch","orcid":"https://orcid.org/0000-0002-1164-3082"},"institutions":[{"id":"https://openalex.org/I31512782","display_name":"Technical University of Darmstadt","ror":"https://ror.org/05n911h24","country_code":"DE","type":"education","lineage":["https://openalex.org/I31512782"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Andreas Koch","raw_affiliation_strings":["Embedded Systems and Applications Group, Technische Universit\u00e4t Darmstadt, Germany"],"affiliations":[{"raw_affiliation_string":"Embedded Systems and Applications Group, Technische Universit\u00e4t Darmstadt, Germany","institution_ids":["https://openalex.org/I31512782"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5062200941"],"corresponding_institution_ids":["https://openalex.org/I94509681"],"apc_list":null,"apc_paid":null,"fwci":1.763,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.86265152,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"0","issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8234550356864929},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.6136112809181213},{"id":"https://openalex.org/keywords/speculative-multithreading","display_name":"Speculative multithreading","score":0.6041857004165649},{"id":"https://openalex.org/keywords/high-level-programming-language","display_name":"High-level programming language","score":0.5588407516479492},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4017263352870941},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.34766191244125366},{"id":"https://openalex.org/keywords/programming-paradigm","display_name":"Programming paradigm","score":0.07853031158447266},{"id":"https://openalex.org/keywords/multithreading","display_name":"Multithreading","score":0.07230624556541443}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8234550356864929},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.6136112809181213},{"id":"https://openalex.org/C15296174","wikidata":"https://www.wikidata.org/wiki/Q7575343","display_name":"Speculative multithreading","level":4,"score":0.6041857004165649},{"id":"https://openalex.org/C19024347","wikidata":"https://www.wikidata.org/wiki/Q211496","display_name":"High-level programming language","level":3,"score":0.5588407516479492},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4017263352870941},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.34766191244125366},{"id":"https://openalex.org/C34165917","wikidata":"https://www.wikidata.org/wiki/Q188267","display_name":"Programming paradigm","level":2,"score":0.07853031158447266},{"id":"https://openalex.org/C201410400","wikidata":"https://www.wikidata.org/wiki/Q1064412","display_name":"Multithreading","level":3,"score":0.07230624556541443},{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/recosoc.2011.5981506","is_oa":false,"landing_page_url":"https://doi.org/10.1109/recosoc.2011.5981506","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W97339538","https://openalex.org/W151432281","https://openalex.org/W1498824665","https://openalex.org/W1536410156","https://openalex.org/W1555915743","https://openalex.org/W1964769222","https://openalex.org/W1986535055","https://openalex.org/W2006575307","https://openalex.org/W2048167605","https://openalex.org/W2095643031","https://openalex.org/W2095872092","https://openalex.org/W2112438883","https://openalex.org/W2117285153","https://openalex.org/W2132292826","https://openalex.org/W2140435683","https://openalex.org/W2142305167","https://openalex.org/W2142630982","https://openalex.org/W2149252366","https://openalex.org/W4247080994","https://openalex.org/W4285719527","https://openalex.org/W6603924577"],"related_works":["https://openalex.org/W3047022145","https://openalex.org/W3030139520","https://openalex.org/W1567437828","https://openalex.org/W1527925217","https://openalex.org/W3160136729","https://openalex.org/W1503309592","https://openalex.org/W2519339279","https://openalex.org/W99847340","https://openalex.org/W1997145140","https://openalex.org/W1497385637"],"abstract_inverted_index":{"The":[0,56],"PreCoRe":[1,26],"approach":[2,67],"allows":[3],"the":[4,25,34,42,50,60,66,71],"automatic":[5],"generation":[6],"of":[7,28,36,45,53,65,74],"application-specific":[8],"microarchitectures":[9],"from":[10],"C,":[11],"thus":[12],"supporting":[13],"complex":[14],"speculative":[15],"execution":[16],"on":[17],"reconfigurable":[18],"computers.":[19],"In":[20],"this":[21],"work,":[22],"we":[23],"present":[24],"capability":[27],"using":[29],"data-value":[30],"speculation":[31,77],"to":[32,49],"reduce":[33],"latency":[35],"memory":[37],"reads,":[38],"as":[39,41],"well":[40],"lightweight":[43],"extension":[44],"static":[46],"datapath":[47],"controllers":[48],"dynamic":[51],"replay":[52],"misspeculated":[54],"operations.":[55],"experimental":[57],"evaluation":[58],"considers":[59],"performance":[61],"/":[62],"area":[63],"impact":[64],"and":[68],"also":[69],"discusses":[70],"individual":[72],"effects":[73],"combining":[75],"different":[76],"mechanisms.":[78]},"counts_by_year":[{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}