{"id":"https://openalex.org/W3005968412","doi":"https://doi.org/10.1109/reconfig48160.2019.8994778","title":"Compiler-Based High-Level Synthesis of Application-Specific Processors on FPGAs","display_name":"Compiler-Based High-Level Synthesis of Application-Specific Processors on FPGAs","publication_year":2019,"publication_date":"2019-12-01","ids":{"openalex":"https://openalex.org/W3005968412","doi":"https://doi.org/10.1109/reconfig48160.2019.8994778","mag":"3005968412"},"language":"en","primary_location":{"id":"doi:10.1109/reconfig48160.2019.8994778","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig48160.2019.8994778","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 International Conference on ReConFigurable Computing and FPGAs (ReConFig)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5053178713","display_name":"Patrick Plagwitz","orcid":"https://orcid.org/0009-0008-5432-674X"},"institutions":[{"id":"https://openalex.org/I181369854","display_name":"Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg","ror":"https://ror.org/00f7hpc57","country_code":"DE","type":"education","lineage":["https://openalex.org/I181369854"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Patrick Plagwitz","raw_affiliation_strings":["Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU),Department of Computer Science,Germany","Department of Computer Science, Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg (FAU), Germany"],"affiliations":[{"raw_affiliation_string":"Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU),Department of Computer Science,Germany","institution_ids":["https://openalex.org/I181369854"]},{"raw_affiliation_string":"Department of Computer Science, Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg (FAU), Germany","institution_ids":["https://openalex.org/I181369854"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019121790","display_name":"Franz-Josef Streit","orcid":"https://orcid.org/0000-0002-1063-1661"},"institutions":[{"id":"https://openalex.org/I181369854","display_name":"Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg","ror":"https://ror.org/00f7hpc57","country_code":"DE","type":"education","lineage":["https://openalex.org/I181369854"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Franz-Josef Streit","raw_affiliation_strings":["Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU),Department of Computer Science,Germany","Department of Computer Science, Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg (FAU), Germany"],"affiliations":[{"raw_affiliation_string":"Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU),Department of Computer Science,Germany","institution_ids":["https://openalex.org/I181369854"]},{"raw_affiliation_string":"Department of Computer Science, Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg (FAU), Germany","institution_ids":["https://openalex.org/I181369854"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054355703","display_name":"Andreas Becher","orcid":"https://orcid.org/0000-0003-2750-7349"},"institutions":[{"id":"https://openalex.org/I181369854","display_name":"Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg","ror":"https://ror.org/00f7hpc57","country_code":"DE","type":"education","lineage":["https://openalex.org/I181369854"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Andreas Becher","raw_affiliation_strings":["Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU),Department of Computer Science,Germany","Department of Computer Science, Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg (FAU), Germany"],"affiliations":[{"raw_affiliation_string":"Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU),Department of Computer Science,Germany","institution_ids":["https://openalex.org/I181369854"]},{"raw_affiliation_string":"Department of Computer Science, Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg (FAU), Germany","institution_ids":["https://openalex.org/I181369854"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036056755","display_name":"Stefan Wildermann","orcid":"https://orcid.org/0000-0002-4324-2187"},"institutions":[{"id":"https://openalex.org/I181369854","display_name":"Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg","ror":"https://ror.org/00f7hpc57","country_code":"DE","type":"education","lineage":["https://openalex.org/I181369854"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Stefan Wildermann","raw_affiliation_strings":["Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU),Department of Computer Science,Germany","Department of Computer Science, Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg (FAU), Germany"],"affiliations":[{"raw_affiliation_string":"Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU),Department of Computer Science,Germany","institution_ids":["https://openalex.org/I181369854"]},{"raw_affiliation_string":"Department of Computer Science, Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg (FAU), Germany","institution_ids":["https://openalex.org/I181369854"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5076672029","display_name":"J\u00fcrgen Teich","orcid":"https://orcid.org/0000-0001-6285-5862"},"institutions":[{"id":"https://openalex.org/I181369854","display_name":"Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg","ror":"https://ror.org/00f7hpc57","country_code":"DE","type":"education","lineage":["https://openalex.org/I181369854"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"J\u00fcrgen Teich","raw_affiliation_strings":["Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU),Department of Computer Science,Germany","Department of Computer Science, Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg (FAU), Germany"],"affiliations":[{"raw_affiliation_string":"Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU),Department of Computer Science,Germany","institution_ids":["https://openalex.org/I181369854"]},{"raw_affiliation_string":"Department of Computer Science, Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg (FAU), Germany","institution_ids":["https://openalex.org/I181369854"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5053178713"],"corresponding_institution_ids":["https://openalex.org/I181369854"],"apc_list":null,"apc_paid":null,"fwci":0.7223,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.70623532,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8624484539031982},{"id":"https://openalex.org/keywords/microblaze","display_name":"MicroBlaze","score":0.8400132060050964},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.7314712405204773},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6504644155502319},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.555691659450531},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.5280017852783203},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.49445104598999023},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.4567072093486786},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.2643680274486542},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.19668105244636536}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8624484539031982},{"id":"https://openalex.org/C2777575374","wikidata":"https://www.wikidata.org/wiki/Q1644704","display_name":"MicroBlaze","level":3,"score":0.8400132060050964},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.7314712405204773},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6504644155502319},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.555691659450531},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.5280017852783203},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.49445104598999023},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.4567072093486786},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.2643680274486542},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.19668105244636536}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/reconfig48160.2019.8994778","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig48160.2019.8994778","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 International Conference on ReConFigurable Computing and FPGAs (ReConFig)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1686420892","https://openalex.org/W1970032753","https://openalex.org/W1994285181","https://openalex.org/W2025931387","https://openalex.org/W2075921636","https://openalex.org/W2111488604","https://openalex.org/W2138362897","https://openalex.org/W2148949838","https://openalex.org/W2154009134","https://openalex.org/W2157855196","https://openalex.org/W2770023641","https://openalex.org/W2912700011","https://openalex.org/W3149596646","https://openalex.org/W4232751114","https://openalex.org/W6681908277"],"related_works":["https://openalex.org/W2371772824","https://openalex.org/W2350519679","https://openalex.org/W2376312311","https://openalex.org/W2354823813","https://openalex.org/W2427933582","https://openalex.org/W2612099726","https://openalex.org/W2091689272","https://openalex.org/W2531450434","https://openalex.org/W2160632767","https://openalex.org/W1975283619"],"abstract_inverted_index":{"In":[0],"order":[1],"to":[2,26,52,127,225],"meet":[3],"tight":[4],"performance":[5,117],"and/or":[6],"energy":[7],"constraints":[8],"of":[9,14,24,56,63,82,89,116,154,179,187,205,217],"embedded":[10],"systems,":[11],"the":[12,54,129,167,177,203,206],"implementation":[13],"applications":[15],"in":[16,72,114,131,215],"hardware":[17,38,57,219],"is":[18,125],"often":[19,76],"a":[20,50,60,122,136,141,146,184,188],"must.":[21],"However,":[22,109],"mapping":[23],"algorithms":[25],"platforms,":[27],"as":[28,121,135],"for":[29],"example":[30],"Field-Programmable":[31],"Gate":[32],"Arrays":[33],"(FPGAs),":[34],"still":[35],"requires":[36],"comprehensive":[37],"knowledge":[39],"and":[40,86,118,173,199,221],"sometimes":[41],"long":[42],"design":[43,194],"cycles.":[44],"Modern":[45],"High-Level":[46],"Synthesis":[47],"(HLS)":[48],"offers":[49],"means":[51],"ease":[53],"generation":[55],"implementations":[58],"from":[59,160,202],"software":[61,132],"specification":[62],"an":[64],"application.":[65],"Although":[66],"these":[67,110],"tools":[68],"have":[69],"improved":[70],"greatly":[71],"recent":[73],"years,":[74],"they":[75],"do":[77],"not":[78],"provide":[79],"full":[80],"coverage":[81],"important":[83],"programming":[84],"constructs":[85],"are":[87],"therefore":[88],"limited":[90],"use":[91],"when":[92],"used":[93,126],"with":[94,103,112],"existing":[95],"or":[96],"automatically":[97],"generated":[98],"code.":[99],"Soft-core":[100],"processors":[101,172],"implemented":[102],"FPGA-logic":[104],"can":[105],"circumvent":[106],"this":[107],"limitation.":[108],"come":[111],"drawbacks":[113],"terms":[115,216],"resource":[119,197],"requirements":[120],"general-purpose":[123],"architecture":[124],"implement":[128],"application":[130,191],"rather":[133],"than":[134],"highly":[137],"specialized":[138],"circuit.":[139],"As":[140],"remedy,":[142],"our":[143,180,209],"work":[144],"presents":[145],"novel":[147],"compiler-based":[148,207],"synthesis":[149],"methodology":[150],"that":[151],"generates":[152],"networks":[153],"Application-Specific":[155],"Instruction":[156,226],"Set":[157,227],"Processors":[158],"(ASIPs)":[159],"unmodified":[161],"C/C++":[162],"algorithms.":[163],"We":[164],"thereby":[165],"bridge":[166],"gap":[168],"between":[169],"traditional":[170],"soft-core":[171],"HLS.":[174],"To":[175],"show":[176],"practicability":[178],"approach,":[181,208],"we":[182],"present":[183],"case":[185],"study":[186],"JPEG":[189],"decoder":[190],"while":[192],"investigating":[193],"objectives":[195],"like":[196],"costs":[198],"performance.":[200],"Apart":[201],"generality":[204],"approach":[210],"also":[211],"shows":[212],"better":[213],"results":[214],"required":[218],"resources":[220],"execution":[222],"times":[223],"compared":[224],"Architecture":[228],"(ISA)-fixed":[229],"commercial":[230],"Xilinx":[231],"MicroBlaze":[232],"soft-cores.":[233]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}