{"id":"https://openalex.org/W3006525387","doi":"https://doi.org/10.1109/reconfig48160.2019.8994777","title":"Approximate Adder Tree Synthesis for FPGAs","display_name":"Approximate Adder Tree Synthesis for FPGAs","publication_year":2019,"publication_date":"2019-12-01","ids":{"openalex":"https://openalex.org/W3006525387","doi":"https://doi.org/10.1109/reconfig48160.2019.8994777","mag":"3006525387"},"language":"en","primary_location":{"id":"doi:10.1109/reconfig48160.2019.8994777","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig48160.2019.8994777","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 International Conference on ReConFigurable Computing and FPGAs (ReConFig)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5023413626","display_name":"Sina Boroumand","orcid":null},"institutions":[{"id":"https://openalex.org/I47508984","display_name":"Imperial College London","ror":"https://ror.org/041kmwe10","country_code":"GB","type":"education","lineage":["https://openalex.org/I47508984"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"Sina Boroumand","raw_affiliation_strings":["Imperial College London, London, UK"],"affiliations":[{"raw_affiliation_string":"Imperial College London, London, UK","institution_ids":["https://openalex.org/I47508984"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5011244614","display_name":"Philip Brisk","orcid":"https://orcid.org/0000-0003-0083-9781"},"institutions":[{"id":"https://openalex.org/I103635307","display_name":"University of California, Riverside","ror":"https://ror.org/03nawhv43","country_code":"US","type":"education","lineage":["https://openalex.org/I103635307"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Philip Brisk","raw_affiliation_strings":["University of California, Riverside, Riverside, USA"],"affiliations":[{"raw_affiliation_string":"University of California, Riverside, Riverside, USA","institution_ids":["https://openalex.org/I103635307"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5023413626"],"corresponding_institution_ids":["https://openalex.org/I47508984"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.16763003,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.6877344846725464},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6338663101196289},{"id":"https://openalex.org/keywords/heuristics","display_name":"Heuristics","score":0.5913854241371155},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5189306735992432},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.4873860478401184},{"id":"https://openalex.org/keywords/heuristic","display_name":"Heuristic","score":0.46845531463623047},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.44060277938842773},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.4346499443054199},{"id":"https://openalex.org/keywords/tree","display_name":"Tree (set theory)","score":0.43006765842437744},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.42262911796569824},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3806539475917816},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.3651619553565979},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.3052675724029541},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.190353661775589}],"concepts":[{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.6877344846725464},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6338663101196289},{"id":"https://openalex.org/C127705205","wikidata":"https://www.wikidata.org/wiki/Q5748245","display_name":"Heuristics","level":2,"score":0.5913854241371155},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5189306735992432},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.4873860478401184},{"id":"https://openalex.org/C173801870","wikidata":"https://www.wikidata.org/wiki/Q201413","display_name":"Heuristic","level":2,"score":0.46845531463623047},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.44060277938842773},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.4346499443054199},{"id":"https://openalex.org/C113174947","wikidata":"https://www.wikidata.org/wiki/Q2859736","display_name":"Tree (set theory)","level":2,"score":0.43006765842437744},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.42262911796569824},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3806539475917816},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.3651619553565979},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.3052675724029541},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.190353661775589},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/reconfig48160.2019.8994777","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig48160.2019.8994777","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 International Conference on ReConFigurable Computing and FPGAs (ReConFig)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.46000000834465027,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":71,"referenced_works":["https://openalex.org/W1605020135","https://openalex.org/W1699274509","https://openalex.org/W1834244558","https://openalex.org/W1929609097","https://openalex.org/W1937235839","https://openalex.org/W1976044153","https://openalex.org/W1980697457","https://openalex.org/W1983849809","https://openalex.org/W1984859138","https://openalex.org/W1986966476","https://openalex.org/W1996796834","https://openalex.org/W1998824039","https://openalex.org/W2005487033","https://openalex.org/W2012477396","https://openalex.org/W2014049686","https://openalex.org/W2020217519","https://openalex.org/W2032770711","https://openalex.org/W2052373731","https://openalex.org/W2076793873","https://openalex.org/W2093112037","https://openalex.org/W2098158887","https://openalex.org/W2099198033","https://openalex.org/W2103490953","https://openalex.org/W2105035536","https://openalex.org/W2110452354","https://openalex.org/W2112637319","https://openalex.org/W2114837206","https://openalex.org/W2116094656","https://openalex.org/W2118340347","https://openalex.org/W2120474114","https://openalex.org/W2123358761","https://openalex.org/W2124651102","https://openalex.org/W2126779549","https://openalex.org/W2127063049","https://openalex.org/W2128027813","https://openalex.org/W2131812496","https://openalex.org/W2135060305","https://openalex.org/W2135700290","https://openalex.org/W2146434984","https://openalex.org/W2147841263","https://openalex.org/W2151097162","https://openalex.org/W2155385791","https://openalex.org/W2155444381","https://openalex.org/W2164756661","https://openalex.org/W2253595223","https://openalex.org/W2265166184","https://openalex.org/W2293347572","https://openalex.org/W2396652958","https://openalex.org/W2401611945","https://openalex.org/W2525941697","https://openalex.org/W2535375934","https://openalex.org/W2553417306","https://openalex.org/W2560114385","https://openalex.org/W2562079981","https://openalex.org/W2578985517","https://openalex.org/W2588565458","https://openalex.org/W2626986277","https://openalex.org/W2783047454","https://openalex.org/W2791487486","https://openalex.org/W2798328726","https://openalex.org/W3140847110","https://openalex.org/W3142056391","https://openalex.org/W3145668619","https://openalex.org/W3150871057","https://openalex.org/W3158792238","https://openalex.org/W4230979891","https://openalex.org/W4244220974","https://openalex.org/W4247431052","https://openalex.org/W4249112933","https://openalex.org/W6677490153","https://openalex.org/W6712458530"],"related_works":["https://openalex.org/W2155289750","https://openalex.org/W1877758821","https://openalex.org/W2098419840","https://openalex.org/W1966764473","https://openalex.org/W2789349722","https://openalex.org/W4281558578","https://openalex.org/W1985308002","https://openalex.org/W2766377030","https://openalex.org/W1977171228","https://openalex.org/W2121963733"],"abstract_inverted_index":{"Compressor":[0],"trees":[1,146],"can":[2,26],"be":[3],"used":[4],"as":[5,46],"parts":[6],"of":[7,63,119,172,190],"larger":[8],"arithmetic":[9,25,33,174,184],"circuits":[10],"in":[11,69,73,136,154],"application-specific":[12],"accelerators.":[13],"Machine":[14],"learning":[15],"and":[16,79,151],"other":[17],"application":[18],"domains":[19],"that":[20,143],"are":[21],"amenable":[22],"to":[23,60,103,156,176,182],"approximate":[24,28,32,42,51,94,123,132,144],"leverage":[27],"accelerators":[29],"constructed":[30],"from":[31],"components.":[34],"To":[35,83],"this":[36,38],"end,":[37],"paper":[39],"introduces":[40,99],"an":[41],"8:3":[43,133],"parallel":[44,55,105,120,134],"counter":[45,56,106,135],"a":[47,88,100,117,169,179,187],"building":[48],"block":[49,66],"for":[50,93,168,186],"arithmetic.":[52],"This":[53,166],"specific":[54],"was":[57],"chosen":[58],"due":[59],"its":[61],"compatibility":[62],"the":[64,122,131,162],"logic":[65,149,152],"architectures":[67],"present":[68],"modern":[70],"commercial":[71],"FPGAs,":[72],"particular,":[74],"fracturable":[75],"lookup":[76],"tables":[77],"(LUTs)":[78],"dedicated":[80],"carry":[81],"chains.":[82],"best":[84],"exploit":[85],"these":[86],"features,":[87],"synthesis":[89,113,126],"heuristic":[90,127],"is":[91],"proposed":[92],"compressor":[95,111,124,145,158],"tree":[96,112,125,159],"synthesis,":[97],"which":[98],"move-and-duplicate":[101],"transformation":[102],"increase":[104],"utilization.":[107],"While":[108],"prior":[109],"(exact)":[110],"heuristics":[114],"relied":[115],"on":[116],"library":[118],"counters,":[121],"introduced":[128],"here":[129],"employs":[130],"isolation.":[137],"The":[138],"experimental":[139],"results":[140],"reported":[141],"demonstrate":[142],"use":[147],"fewer":[148],"resources":[150],"levels,":[153],"comparison":[155],"exact":[157],"synthesized":[160],"using":[161],"same":[163],"basic":[164],"approach.":[165],"allows":[167],"greater":[170],"number":[171],"faster":[173],"operators":[175],"fit":[177],"into":[178],"fixed-size":[180],"device":[181],"maximize":[183],"throughput":[185],"given":[188],"level":[189],"accuracy.":[191]},"counts_by_year":[{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}