{"id":"https://openalex.org/W3006629852","doi":"https://doi.org/10.1109/reconfig48160.2019.8994776","title":"A Library of FSM-based Floating-Point Arithmetic Functions on FPGAs","display_name":"A Library of FSM-based Floating-Point Arithmetic Functions on FPGAs","publication_year":2019,"publication_date":"2019-12-01","ids":{"openalex":"https://openalex.org/W3006629852","doi":"https://doi.org/10.1109/reconfig48160.2019.8994776","mag":"3006629852"},"language":"en","primary_location":{"id":"doi:10.1109/reconfig48160.2019.8994776","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig48160.2019.8994776","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 International Conference on ReConFigurable Computing and FPGAs (ReConFig)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5088410165","display_name":"Atiyehsadat Panahi","orcid":null},"institutions":[{"id":"https://openalex.org/I78715868","display_name":"University of Arkansas at Fayetteville","ror":"https://ror.org/05jbt9m15","country_code":"US","type":"education","lineage":["https://openalex.org/I78715868"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Atiyehsadat Panahi","raw_affiliation_strings":["University of Arkansas,Department of Computer Science and Computer Engineering,Fayetteville,USA","Department of Computer Science and Computer Engineering, University of Arkansas, Fayetteville, USA"],"affiliations":[{"raw_affiliation_string":"University of Arkansas,Department of Computer Science and Computer Engineering,Fayetteville,USA","institution_ids":["https://openalex.org/I78715868"]},{"raw_affiliation_string":"Department of Computer Science and Computer Engineering, University of Arkansas, Fayetteville, USA","institution_ids":["https://openalex.org/I78715868"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078843808","display_name":"Keaten Stokke","orcid":null},"institutions":[{"id":"https://openalex.org/I78715868","display_name":"University of Arkansas at Fayetteville","ror":"https://ror.org/05jbt9m15","country_code":"US","type":"education","lineage":["https://openalex.org/I78715868"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Keaten Stokke","raw_affiliation_strings":["University of Arkansas,Department of Computer Science and Computer Engineering,Fayetteville,USA","Department of Computer Science and Computer Engineering, University of Arkansas, Fayetteville, USA"],"affiliations":[{"raw_affiliation_string":"University of Arkansas,Department of Computer Science and Computer Engineering,Fayetteville,USA","institution_ids":["https://openalex.org/I78715868"]},{"raw_affiliation_string":"Department of Computer Science and Computer Engineering, University of Arkansas, Fayetteville, USA","institution_ids":["https://openalex.org/I78715868"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5062434121","display_name":"David Andrews","orcid":"https://orcid.org/0000-0003-1464-7107"},"institutions":[{"id":"https://openalex.org/I78715868","display_name":"University of Arkansas at Fayetteville","ror":"https://ror.org/05jbt9m15","country_code":"US","type":"education","lineage":["https://openalex.org/I78715868"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"David Andrews","raw_affiliation_strings":["University of Arkansas,Department of Computer Science and Computer Engineering,Fayetteville,USA","Department of Computer Science and Computer Engineering, University of Arkansas, Fayetteville, USA"],"affiliations":[{"raw_affiliation_string":"University of Arkansas,Department of Computer Science and Computer Engineering,Fayetteville,USA","institution_ids":["https://openalex.org/I78715868"]},{"raw_affiliation_string":"Department of Computer Science and Computer Engineering, University of Arkansas, Fayetteville, USA","institution_ids":["https://openalex.org/I78715868"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5088410165"],"corresponding_institution_ids":["https://openalex.org/I78715868"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.22700685,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7849180698394775},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7168744802474976},{"id":"https://openalex.org/keywords/lookup-table","display_name":"Lookup table","score":0.6842349767684937},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.554814875125885},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.49230706691741943},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.47099918127059937},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.4679834842681885},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.4469899535179138},{"id":"https://openalex.org/keywords/floating-point","display_name":"Floating point","score":0.4408886134624481},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4128264784812927},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.36844009160995483},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.345725417137146},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.20876699686050415},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.14246195554733276},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.08287915587425232}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7849180698394775},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7168744802474976},{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.6842349767684937},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.554814875125885},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.49230706691741943},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.47099918127059937},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.4679834842681885},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.4469899535179138},{"id":"https://openalex.org/C84211073","wikidata":"https://www.wikidata.org/wiki/Q117879","display_name":"Floating point","level":2,"score":0.4408886134624481},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4128264784812927},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.36844009160995483},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.345725417137146},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.20876699686050415},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.14246195554733276},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.08287915587425232},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/reconfig48160.2019.8994776","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig48160.2019.8994776","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 International Conference on ReConFigurable Computing and FPGAs (ReConFig)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W114677020","https://openalex.org/W1555915743","https://openalex.org/W1568503047","https://openalex.org/W1573666851","https://openalex.org/W1861262881","https://openalex.org/W1968559856","https://openalex.org/W1994414333","https://openalex.org/W2021808181","https://openalex.org/W2030898836","https://openalex.org/W2032195315","https://openalex.org/W2115002670","https://openalex.org/W2115452265","https://openalex.org/W2132730902","https://openalex.org/W2162880276","https://openalex.org/W2167236161","https://openalex.org/W2482880624","https://openalex.org/W2563292635","https://openalex.org/W2650929559","https://openalex.org/W2725179571","https://openalex.org/W2785798363","https://openalex.org/W7048978559"],"related_works":["https://openalex.org/W2117300767","https://openalex.org/W2024574431","https://openalex.org/W2131696304","https://openalex.org/W2374017528","https://openalex.org/W4285503609","https://openalex.org/W2126248441","https://openalex.org/W3028347934","https://openalex.org/W2185692674","https://openalex.org/W2552788564","https://openalex.org/W2166062472"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"we":[3],"present":[4],"a":[5,29,159,165],"new":[6,119],"low-latency":[7],"method":[8],"based":[9],"on":[10,28],"Finite":[11],"State":[12],"Machines":[13],"(FSMs)":[14],"for":[15,44,65,81,95,148],"basic":[16,149],"arithmetic":[17,37,150],"as":[18,20,128,130],"well":[19,129],"trigonometric":[21,62,77,154],"functions":[22,63,78],"in":[23,72,83,125,144,161],"single-precision":[24],"IEEE-754":[25],"standard":[26],"format":[27],"Virtex-7":[30],"Field-Programmable":[31],"Gate":[32],"Array":[33],"(FPGA).":[34],"Basic":[35],"floating-point":[36],"methods":[38,120],"are":[39,69,79,93,107],"optimized":[40,80],"to":[41,101,121,153,171],"reduce":[42],"latency":[43],"scalar":[45],"operations":[46],"where":[47,87],"the":[48,126,131,138],"cost":[49],"of":[50,117],"pipelining":[51],"cannot":[52],"be":[53],"amortized":[54],"over":[55],"longer":[56],"data":[57,97],"streams.":[58],"We":[59],"provide":[60],"additional":[61],"necessary":[64],"image":[66],"correlation":[67],"that":[68,137],"not":[70,99],"found":[71],"other":[73],"open-source":[74],"libraries.":[75],"Our":[76],"use":[82],"system-on-chip":[84],"FPGA":[85],"architectures":[86],"Block":[88],"Random":[89],"Access":[90],"Memories":[91],"(BRAMs)":[92],"needed":[94],"buffering":[96],"and":[98,114,146,164],"available":[100],"hold":[102],"large":[103],"lookup":[104],"tables.":[105],"Results":[106],"presented":[108,124],"comparing":[109],"delay,":[110],"area,":[111],"operating":[112,167],"frequency,":[113],"memory":[115,162],"utilization":[116],"our":[118,156],"previous":[122],"works":[123],"literature":[127],"built-in":[132],"Vivado":[133],"IP.":[134],"Comparisons":[135],"show":[136],"proposed":[139],"approach":[140],"offers":[141],"key":[142],"improvements":[143],"delay":[145],"area":[147],"operations.":[151],"Specific":[152],"functions,":[155],"implementations":[157],"offer":[158],"reduction":[160],"requirements":[163],"higher":[166],"clock":[168],"frequency":[169],"compared":[170],"existing":[172],"works.":[173]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}