{"id":"https://openalex.org/W2913355112","doi":"https://doi.org/10.1109/reconfig.2018.8641703","title":"IMPRESS: Automated Tool for the Implementation of Highly Flexible Partial Reconfigurable Systems with Xilinx Vivado","display_name":"IMPRESS: Automated Tool for the Implementation of Highly Flexible Partial Reconfigurable Systems with Xilinx Vivado","publication_year":2018,"publication_date":"2018-12-01","ids":{"openalex":"https://openalex.org/W2913355112","doi":"https://doi.org/10.1109/reconfig.2018.8641703","mag":"2913355112"},"language":"en","primary_location":{"id":"doi:10.1109/reconfig.2018.8641703","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2018.8641703","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 International Conference on ReConFigurable Computing and FPGAs (ReConFig)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://oa.upm.es/54585/1/Xilinx_Vivado.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5008750317","display_name":"Rafael Zamacola","orcid":"https://orcid.org/0000-0003-4984-9219"},"institutions":[{"id":"https://openalex.org/I88060688","display_name":"Universidad Polit\u00e9cnica de Madrid","ror":"https://ror.org/03n6nwv02","country_code":"ES","type":"education","lineage":["https://openalex.org/I88060688"]}],"countries":["ES"],"is_corresponding":true,"raw_author_name":"Rafael Zamacola","raw_affiliation_strings":["Centro de Electr\u00f3nica Industrial, Universidad Polit\u00e9cnica de Madrid"],"affiliations":[{"raw_affiliation_string":"Centro de Electr\u00f3nica Industrial, Universidad Polit\u00e9cnica de Madrid","institution_ids":["https://openalex.org/I88060688"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081601960","display_name":"Alberto Garc\u00eda Mart\u00ednez","orcid":"https://orcid.org/0000-0001-5740-1321"},"institutions":[{"id":"https://openalex.org/I88060688","display_name":"Universidad Polit\u00e9cnica de Madrid","ror":"https://ror.org/03n6nwv02","country_code":"ES","type":"education","lineage":["https://openalex.org/I88060688"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Alberto Garcia Martinez","raw_affiliation_strings":["Centro de Electr\u00f3nica Industrial, Universidad Polit\u00e9cnica de Madrid"],"affiliations":[{"raw_affiliation_string":"Centro de Electr\u00f3nica Industrial, Universidad Polit\u00e9cnica de Madrid","institution_ids":["https://openalex.org/I88060688"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037658538","display_name":"Javier Mora","orcid":"https://orcid.org/0000-0002-2247-1546"},"institutions":[{"id":"https://openalex.org/I88060688","display_name":"Universidad Polit\u00e9cnica de Madrid","ror":"https://ror.org/03n6nwv02","country_code":"ES","type":"education","lineage":["https://openalex.org/I88060688"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Javier Mora","raw_affiliation_strings":["Centro de Electr\u00f3nica Industrial, Universidad Polit\u00e9cnica de Madrid"],"affiliations":[{"raw_affiliation_string":"Centro de Electr\u00f3nica Industrial, Universidad Polit\u00e9cnica de Madrid","institution_ids":["https://openalex.org/I88060688"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049132754","display_name":"A. Otero","orcid":"https://orcid.org/0000-0003-4995-7009"},"institutions":[{"id":"https://openalex.org/I88060688","display_name":"Universidad Polit\u00e9cnica de Madrid","ror":"https://ror.org/03n6nwv02","country_code":"ES","type":"education","lineage":["https://openalex.org/I88060688"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Andres Otero","raw_affiliation_strings":["Centro de Electr\u00f3nica Industrial, Universidad Polit\u00e9cnica de Madrid"],"affiliations":[{"raw_affiliation_string":"Centro de Electr\u00f3nica Industrial, Universidad Polit\u00e9cnica de Madrid","institution_ids":["https://openalex.org/I88060688"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5018537955","display_name":"Eduardo de la Torre","orcid":"https://orcid.org/0000-0001-5697-0573"},"institutions":[{"id":"https://openalex.org/I88060688","display_name":"Universidad Polit\u00e9cnica de Madrid","ror":"https://ror.org/03n6nwv02","country_code":"ES","type":"education","lineage":["https://openalex.org/I88060688"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Eduardo de La Torre","raw_affiliation_strings":["Centro de Electr\u00f3nica Industrial, Universidad Polit\u00e9cnica de Madrid"],"affiliations":[{"raw_affiliation_string":"Centro de Electr\u00f3nica Industrial, Universidad Polit\u00e9cnica de Madrid","institution_ids":["https://openalex.org/I88060688"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5008750317"],"corresponding_institution_ids":["https://openalex.org/I88060688"],"apc_list":null,"apc_paid":null,"fwci":2.1495,"has_fulltext":true,"cited_by_count":20,"citation_normalized_percentile":{"value":0.89135284,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.8656508922576904},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8239885568618774},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.8032968044281006},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.761910080909729},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.7084007263183594},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5768430233001709},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.4516514837741852},{"id":"https://openalex.org/keywords/focus","display_name":"Focus (optics)","score":0.41969650983810425}],"concepts":[{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.8656508922576904},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8239885568618774},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.8032968044281006},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.761910080909729},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.7084007263183594},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5768430233001709},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.4516514837741852},{"id":"https://openalex.org/C192209626","wikidata":"https://www.wikidata.org/wiki/Q190909","display_name":"Focus (optics)","level":2,"score":0.41969650983810425},{"id":"https://openalex.org/C120665830","wikidata":"https://www.wikidata.org/wiki/Q14620","display_name":"Optics","level":1,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/reconfig.2018.8641703","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2018.8641703","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 International Conference on ReConFigurable Computing and FPGAs (ReConFig)","raw_type":"proceedings-article"},{"id":"pmh:oai:oa.upm.es:54585","is_oa":true,"landing_page_url":"http://oa.upm.es/54585/","pdf_url":"https://oa.upm.es/54585/1/Xilinx_Vivado.pdf","source":{"id":"https://openalex.org/S4377196323","display_name":"UPM Digital Archive (Technical University of Madrid)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I88060688","host_organization_name":"Universidad Polit\u00e9cnica de Madrid","host_organization_lineage":["https://openalex.org/I88060688"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IMPRESS: Automated Tool for the Implementation of Highly Flexible Partial Reconfigurable Systems with Xilinx Vivado | 2018 International Conference on ReConFigurable Computing and FPGAs (ReConFig) | 3-5 diciembre 2018 | Cancun, Mexico","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":{"id":"pmh:oai:oa.upm.es:54585","is_oa":true,"landing_page_url":"http://oa.upm.es/54585/","pdf_url":"https://oa.upm.es/54585/1/Xilinx_Vivado.pdf","source":{"id":"https://openalex.org/S4377196323","display_name":"UPM Digital Archive (Technical University of Madrid)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I88060688","host_organization_name":"Universidad Polit\u00e9cnica de Madrid","host_organization_lineage":["https://openalex.org/I88060688"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IMPRESS: Automated Tool for the Implementation of Highly Flexible Partial Reconfigurable Systems with Xilinx Vivado | 2018 International Conference on ReConFigurable Computing and FPGAs (ReConFig) | 3-5 diciembre 2018 | Cancun, Mexico","raw_type":"info:eu-repo/semantics/conferenceObject"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.5799999833106995,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2913355112.pdf","grobid_xml":"https://content.openalex.org/works/W2913355112.grobid-xml"},"referenced_works_count":14,"referenced_works":["https://openalex.org/W1531086201","https://openalex.org/W1621597718","https://openalex.org/W2045044674","https://openalex.org/W2067433136","https://openalex.org/W2075397577","https://openalex.org/W2082507415","https://openalex.org/W2096132155","https://openalex.org/W2118073772","https://openalex.org/W2128492110","https://openalex.org/W2132637914","https://openalex.org/W2183064252","https://openalex.org/W2537817662","https://openalex.org/W2545885293","https://openalex.org/W2588101650"],"related_works":["https://openalex.org/W2810427553","https://openalex.org/W2135053878","https://openalex.org/W2941434274","https://openalex.org/W2340647897","https://openalex.org/W2808484818","https://openalex.org/W1574948540","https://openalex.org/W2204754129","https://openalex.org/W275424163","https://openalex.org/W2156641820","https://openalex.org/W1569711686"],"abstract_inverted_index":{"Dynamic":[0],"partial":[1,15,122],"reconfiguration":[2,16],"is":[3,141,178],"considered":[4],"a":[5,57,112,127,170,175,181],"great":[6],"technique":[7],"to":[8,42,63,77,87],"increase":[9,44],"flexibility":[10,59],"in":[11,45,169],"FPGA":[12],"designs.":[13],"However,":[14,81],"flows":[17],"supported":[18],"by":[19],"commercial":[20,79],"tools,":[21],"such":[22],"as":[23,54,56,180],"Xilinx":[24,103],"Vivado,":[25,125],"still":[26],"have":[27,72],"many":[28],"limitations.":[29],"Foremost":[30],"among":[31],"them":[32],"are":[33],"the":[34,46,51,64,75,82,102,117,131,136,144,185],"lack":[35],"of":[36,66,92,101,120,133,146,184],"support":[37,140],"for":[38,96,116,143,165],"relocation,":[39],"which":[40],"leads":[41],"an":[43],"on-system":[47],"memory":[48],"requirements":[49],"and":[50,135,157],"synthesis":[52],"time,":[53],"well":[55],"reduced":[58],"when":[60],"it":[61],"comes":[62],"definition":[65],"reconfigurable":[67,147,163],"regions.":[68],"Several":[69],"academic":[70],"tools":[71,94],"appeared":[73],"over":[74],"years":[76],"improve":[78],"flows.":[80],"technology":[83],"shift":[84],"from":[85],"ISE":[86],"Vivado":[88,155],"has":[89],"left":[90],"most":[91,100],"these":[93],"unusable":[95],"newer":[97],"FPGAs,":[98],"including":[99],"Series-7":[104],"devices.":[105],"In":[106],"this":[107],"paper,":[108],"authors":[109],"present":[110],"IMPRESS,":[111],"TCL":[113],"script-based":[114],"tool":[115],"automated":[118,172],"generation":[119],"relocatable":[121],"bitstreams":[123],"under":[124],"with":[126,154],"strong":[128],"focus":[129],"on":[130,174],"ease":[132],"use":[134,182],"system":[137],"flexibility.":[138],"Special":[139],"provided":[142,179],"implementation":[145],"systems":[148],"that":[149],"include":[150],"IP":[151],"blocks":[152],"generated":[153],"HLS":[156],"standardized":[158],"bus":[159],"interfaces.":[160],"A":[161],"stream-based":[162],"architecture":[164],"image":[166],"filtering,":[167],"implemented":[168],"fully":[171],"manner":[173],"Zynq":[176],"SoPC,":[177],"case":[183],"tool.":[186]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":6},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":5},{"year":2019,"cited_by_count":4}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}
