{"id":"https://openalex.org/W2587856256","doi":"https://doi.org/10.1109/reconfig.2016.7857191","title":"The portable open-source IP core and utility library PoC","display_name":"The portable open-source IP core and utility library PoC","publication_year":2016,"publication_date":"2016-11-01","ids":{"openalex":"https://openalex.org/W2587856256","doi":"https://doi.org/10.1109/reconfig.2016.7857191","mag":"2587856256"},"language":"en","primary_location":{"id":"doi:10.1109/reconfig.2016.7857191","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2016.7857191","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 International Conference on ReConFigurable Computing and FPGAs (ReConFig)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5055093027","display_name":"Thomas B. Preu\u00dfer","orcid":"https://orcid.org/0000-0003-3998-7896"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Thomas B. Preusser","raw_affiliation_strings":["Technische Universitat Dresden, Dresden, Sachsen, DE"],"affiliations":[{"raw_affiliation_string":"Technische Universitat Dresden, Dresden, Sachsen, DE","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048244155","display_name":"Martin Zabel","orcid":null},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"TU Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Martin Zabel","raw_affiliation_strings":["Institute of Computer Engineering Technische, Universit\u00e4t Dresden, Dresden, Germany"],"affiliations":[{"raw_affiliation_string":"Institute of Computer Engineering Technische, Universit\u00e4t Dresden, Dresden, Germany","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5057587617","display_name":"Patrick Lehmann","orcid":null},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"TU Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Patrick Lehmann","raw_affiliation_strings":["Institute of Computer Engineering Technische, Universit\u00e4t Dresden, Dresden, Germany"],"affiliations":[{"raw_affiliation_string":"Institute of Computer Engineering Technische, Universit\u00e4t Dresden, Dresden, Germany","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5071775505","display_name":"Rainer G. Spallek","orcid":null},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"TU Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Rainer G. Spallek","raw_affiliation_strings":["Institute of Computer Engineering Technische, Universit\u00e4t Dresden, Dresden, Germany"],"affiliations":[{"raw_affiliation_string":"Institute of Computer Engineering Technische, Universit\u00e4t Dresden, Dresden, Germany","institution_ids":["https://openalex.org/I78650965"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5055093027"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.6307,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.70453263,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8498731255531311},{"id":"https://openalex.org/keywords/python","display_name":"Python (programming language)","score":0.5714382529258728},{"id":"https://openalex.org/keywords/vendor","display_name":"Vendor","score":0.569129467010498},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.5517388582229614},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.5249921083450317},{"id":"https://openalex.org/keywords/usable","display_name":"USable","score":0.47016641497612},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.440949022769928},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.4265606999397278},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.41435837745666504},{"id":"https://openalex.org/keywords/extensibility","display_name":"Extensibility","score":0.41255074739456177},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.40179210901260376},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.3835923671722412},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.29083845019340515}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8498731255531311},{"id":"https://openalex.org/C519991488","wikidata":"https://www.wikidata.org/wiki/Q28865","display_name":"Python (programming language)","level":2,"score":0.5714382529258728},{"id":"https://openalex.org/C2777338717","wikidata":"https://www.wikidata.org/wiki/Q1762621","display_name":"Vendor","level":2,"score":0.569129467010498},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.5517388582229614},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.5249921083450317},{"id":"https://openalex.org/C2780615836","wikidata":"https://www.wikidata.org/wiki/Q2471869","display_name":"USable","level":2,"score":0.47016641497612},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.440949022769928},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.4265606999397278},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.41435837745666504},{"id":"https://openalex.org/C32833848","wikidata":"https://www.wikidata.org/wiki/Q4115054","display_name":"Extensibility","level":2,"score":0.41255074739456177},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.40179210901260376},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.3835923671722412},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.29083845019340515},{"id":"https://openalex.org/C144133560","wikidata":"https://www.wikidata.org/wiki/Q4830453","display_name":"Business","level":0,"score":0.0},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0},{"id":"https://openalex.org/C162853370","wikidata":"https://www.wikidata.org/wiki/Q39809","display_name":"Marketing","level":1,"score":0.0},{"id":"https://openalex.org/C136764020","wikidata":"https://www.wikidata.org/wiki/Q466","display_name":"World Wide Web","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/reconfig.2016.7857191","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2016.7857191","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 International Conference on ReConFigurable Computing and FPGAs (ReConFig)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6399999856948853,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W4794157","https://openalex.org/W1570326012","https://openalex.org/W2023146792","https://openalex.org/W2036001857","https://openalex.org/W2089277086","https://openalex.org/W2111568453","https://openalex.org/W2117933081","https://openalex.org/W2119616711","https://openalex.org/W2240016677","https://openalex.org/W6600197467","https://openalex.org/W6690082143"],"related_works":["https://openalex.org/W2037960874","https://openalex.org/W1973069902","https://openalex.org/W2029518208","https://openalex.org/W2269990635","https://openalex.org/W1968547622","https://openalex.org/W4234221021","https://openalex.org/W1567432572","https://openalex.org/W2119904701","https://openalex.org/W2159184138","https://openalex.org/W3177593432"],"abstract_inverted_index":{"Standard":[0],"libraries":[1],"and":[2,7,38,45,54,80,94,108,115,172,183,194,250,258],"frameworks":[3],"boost":[4],"the":[5,13,58,135,158,169,189,200,224,233],"productivity":[6],"performance":[8],"significantly":[9],"as":[10,50,84,86,91,111,117,119,229],"they":[11],"enable":[12,173],"re-use":[14],"of":[15,33,68,99,180,191,203,217,226,235],"optimized":[16],"solutions":[17,35,73],"for":[18,74,112],"standard":[19,34,75],"tasks.":[20,76],"Hardware":[21],"designs":[22,40],"are":[23,142,148,164],"often":[24,42],"unnecessarily":[25],"complex":[26,237],"because":[27],"a)":[28],"a":[29,128,218],"rich":[30],"RTL":[31],"library":[32,102,193],"is":[36,125,132,153,213,246],"missing":[37],"b)":[39],"must":[41],"sacrifice":[43],"portable":[44],"readable":[46],"behavioral":[47],"descriptions":[48],"so":[49],"to":[51,167,230],"meet":[52],"timing":[53],"area":[55],"constraints":[56],"on":[57,97],"targeted":[59],"device.":[60],"The":[61,101,161,243],"PoC":[62,198],"Library":[63],"addresses":[64],"these":[65],"issues.":[66],"First":[67],"all,":[69],"it":[70],"provides":[71],"abstracted":[72],"These":[77],"include":[78],"single-":[79],"dual-port":[81],"memory":[82],"components":[83],"well":[85,118],"higher-level":[87],"data":[88,186],"structures":[89],"such":[90],"FIFOs,":[92],"stacks":[93],"deques":[95],"built":[96],"top":[98],"them.":[100],"further":[103],"comprises":[104],"cross-clock":[105],"triggers,":[106],"arithmetic":[107],"algorithmic":[109],"cores,":[110],"wide":[113],"addition":[114],"sorting,":[116],"communication":[120],"stack":[121],"implementations.":[122],"Each":[123],"implementation":[124],"encapsulated":[126],"by":[127,157,207],"stable":[129],"interface":[130],"that":[131,221],"independent":[133],"from":[134],"specific":[136],"target":[137],"platform.":[138],"Nonetheless,":[139],"device-specific":[140],"optimizations":[141],"available":[143],"through":[144],"specialized":[145],"implementations,":[146],"which":[147],"selected":[149],"internally":[150],"whenever":[151],"this":[152],"beneficial":[154],"or":[155],"necessitated":[156],"vendor":[159],"flow.":[160],"provided":[162],"modules":[163],"highly":[165],"parametrizable":[166],"fit":[168],"application":[170,241],"needs":[171],"design":[174],"space":[175],"exploration.":[176],"An":[177],"extensive":[178],"set":[179],"utility":[181],"functions":[182],"frequently":[184],"used":[185],"types":[187],"benefits":[188],"conciseness":[190],"both":[192],"user":[195],"code.":[196],"Finally,":[197],"enables":[199],"continuous":[201],"verification":[202,211],"its":[204],"IP":[205],"cores":[206,238],"automated":[208],"testbenches.":[209],"This":[210],"flow":[212,219,244],"only":[214],"one":[215],"part":[216],"infrastructure":[220,245],"also":[222],"supports":[223,251],"generation":[225],"re-usable":[227],"netlists":[228],"speed":[231],"up":[232],"integration":[234],"more":[236],"into":[239],"an":[240],"design.":[242],"implemented":[247],"in":[248],"Python":[249],"various":[252],"simulation":[253],"backends,":[254],"synthesis":[255],"tool":[256],"chains":[257],"operating":[259],"systems.":[260]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}