{"id":"https://openalex.org/W2588339309","doi":"https://doi.org/10.1109/reconfig.2016.7857160","title":"Coarse grain reconfiguration: Power estimation and management flow for hybrid gated systems","display_name":"Coarse grain reconfiguration: Power estimation and management flow for hybrid gated systems","publication_year":2016,"publication_date":"2016-11-01","ids":{"openalex":"https://openalex.org/W2588339309","doi":"https://doi.org/10.1109/reconfig.2016.7857160","mag":"2588339309"},"language":"en","primary_location":{"id":"doi:10.1109/reconfig.2016.7857160","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2016.7857160","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 International Conference on ReConFigurable Computing and FPGAs (ReConFig)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5018543320","display_name":"Tiziana Fanni","orcid":"https://orcid.org/0000-0002-4301-6497"},"institutions":[{"id":"https://openalex.org/I172446870","display_name":"University of Cagliari","ror":"https://ror.org/003109y17","country_code":"IT","type":"education","lineage":["https://openalex.org/I172446870"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Tiziana Fanni","raw_affiliation_strings":["Dept. of Electrical and Electronics Engineering, University of Cagliari"],"affiliations":[{"raw_affiliation_string":"Dept. of Electrical and Electronics Engineering, University of Cagliari","institution_ids":["https://openalex.org/I172446870"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5007761671","display_name":"Luigi Raffo","orcid":"https://orcid.org/0000-0001-9683-009X"},"institutions":[{"id":"https://openalex.org/I172446870","display_name":"University of Cagliari","ror":"https://ror.org/003109y17","country_code":"IT","type":"education","lineage":["https://openalex.org/I172446870"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Luigi Raffo","raw_affiliation_strings":["Dept. of Electrical and Electronics Engineering, University of Cagliari"],"affiliations":[{"raw_affiliation_string":"Dept. of Electrical and Electronics Engineering, University of Cagliari","institution_ids":["https://openalex.org/I172446870"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5018543320"],"corresponding_institution_ids":["https://openalex.org/I172446870"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.18666541,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.8775603771209717},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.7991125583648682},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.673620343208313},{"id":"https://openalex.org/keywords/work-flow","display_name":"Work flow","score":0.5882863998413086},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.548315703868866},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5255833268165588},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.520957350730896},{"id":"https://openalex.org/keywords/flow","display_name":"Flow (mathematics)","score":0.4560205936431885},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.440510630607605},{"id":"https://openalex.org/keywords/power-flow","display_name":"Power flow","score":0.43252307176589966},{"id":"https://openalex.org/keywords/electric-power-system","display_name":"Electric power system","score":0.2809593975543976},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20859158039093018},{"id":"https://openalex.org/keywords/industrial-engineering","display_name":"Industrial engineering","score":0.12332665920257568}],"concepts":[{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.8775603771209717},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.7991125583648682},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.673620343208313},{"id":"https://openalex.org/C2985179714","wikidata":"https://www.wikidata.org/wiki/Q627335","display_name":"Work flow","level":2,"score":0.5882863998413086},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.548315703868866},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5255833268165588},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.520957350730896},{"id":"https://openalex.org/C38349280","wikidata":"https://www.wikidata.org/wiki/Q1434290","display_name":"Flow (mathematics)","level":2,"score":0.4560205936431885},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.440510630607605},{"id":"https://openalex.org/C2986056383","wikidata":"https://www.wikidata.org/wiki/Q556030","display_name":"Power flow","level":4,"score":0.43252307176589966},{"id":"https://openalex.org/C89227174","wikidata":"https://www.wikidata.org/wiki/Q2388981","display_name":"Electric power system","level":3,"score":0.2809593975543976},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20859158039093018},{"id":"https://openalex.org/C13736549","wikidata":"https://www.wikidata.org/wiki/Q4489420","display_name":"Industrial engineering","level":1,"score":0.12332665920257568},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/reconfig.2016.7857160","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2016.7857160","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 International Conference on ReConFigurable Computing and FPGAs (ReConFig)","raw_type":"proceedings-article"},{"id":"pmh:oai:iris.unica.it:11584/223875","is_oa":false,"landing_page_url":"http://hdl.handle.net/11584/223875","pdf_url":null,"source":{"id":"https://openalex.org/S4377196293","display_name":"UNICA IRIS Institutional Research Information System (University of Cagliari)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I172446870","host_organization_name":"University of Cagliari","host_organization_lineage":["https://openalex.org/I172446870"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferencePaper"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.5199999809265137,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1562160190","https://openalex.org/W1938862280","https://openalex.org/W1970398126","https://openalex.org/W1974887540","https://openalex.org/W2014681053","https://openalex.org/W2039998884","https://openalex.org/W2063541818","https://openalex.org/W2077119139","https://openalex.org/W2083987284","https://openalex.org/W2108624780","https://openalex.org/W2135050419","https://openalex.org/W2146551322","https://openalex.org/W2170561432","https://openalex.org/W2287091237","https://openalex.org/W2409447425","https://openalex.org/W3150739659","https://openalex.org/W4250486818","https://openalex.org/W6633592727","https://openalex.org/W6640465865"],"related_works":["https://openalex.org/W1521892965","https://openalex.org/W2016688446","https://openalex.org/W2070693700","https://openalex.org/W2586089541","https://openalex.org/W2097839191","https://openalex.org/W2132107645","https://openalex.org/W2722756370","https://openalex.org/W3200538824","https://openalex.org/W1977754481","https://openalex.org/W135171136"],"abstract_inverted_index":{"This":[0],"work":[1],"presents":[2],"an":[3,42],"automatic":[4],"power":[5],"estimation":[6],"and":[7],"implementation":[8,21],"flow":[9,27],"for":[10],"coarse-grained":[11],"reconfigurable":[12,32],"systems,":[13],"capable":[14],"of":[15,22,35],"guiding":[16],"designers":[17],"towards":[18],"the":[19,31],"optimal":[20],"power-efficient":[23],"systems.":[24],"The":[25],"entire":[26],"is":[28],"assessed":[29],"over":[30],"computing":[33],"core":[34],"a":[36],"dedicated":[37],"image":[38],"processing":[39],"accelerator,":[40],"targeting":[41],"ASIC":[43],"45":[44],"nm":[45],"technology.":[46]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
