{"id":"https://openalex.org/W2588095950","doi":"https://doi.org/10.1109/reconfig.2016.7857154","title":"Area-driven partial reconfiguration for SEU mitigation on SRAM-based FPGAs","display_name":"Area-driven partial reconfiguration for SEU mitigation on SRAM-based FPGAs","publication_year":2016,"publication_date":"2016-11-01","ids":{"openalex":"https://openalex.org/W2588095950","doi":"https://doi.org/10.1109/reconfig.2016.7857154","mag":"2588095950"},"language":"en","primary_location":{"id":"doi:10.1109/reconfig.2016.7857154","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2016.7857154","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 International Conference on ReConFigurable Computing and FPGAs (ReConFig)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5108544773","display_name":"Vavouras Michail","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Michail Vavouras","raw_affiliation_strings":["Electrical and Electronic Engineering Department, Circuits and Systems Group, London, UK"],"affiliations":[{"raw_affiliation_string":"Electrical and Electronic Engineering Department, Circuits and Systems Group, London, UK","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5041150785","display_name":"Christos-Savvas Bouganis","orcid":"https://orcid.org/0000-0002-4906-4510"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Christos-Savvas Bouganis","raw_affiliation_strings":["Electrical and Electronic Engineering Department, Circuits and Systems Group, London, UK"],"affiliations":[{"raw_affiliation_string":"Electrical and Electronic Engineering Department, Circuits and Systems Group, London, UK","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5108544773"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.16979069,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/data-scrubbing","display_name":"Data scrubbing","score":0.9022243022918701},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7969673871994019},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.7920149564743042},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.5996763110160828},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.588183581829071},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5761696100234985},{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.5381373763084412},{"id":"https://openalex.org/keywords/redundancy","display_name":"Redundancy (engineering)","score":0.4843614995479584},{"id":"https://openalex.org/keywords/triple-modular-redundancy","display_name":"Triple modular redundancy","score":0.4335118532180786},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3324979245662689},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.147885262966156}],"concepts":[{"id":"https://openalex.org/C89529581","wikidata":"https://www.wikidata.org/wiki/Q5227348","display_name":"Data scrubbing","level":2,"score":0.9022243022918701},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7969673871994019},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.7920149564743042},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.5996763110160828},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.588183581829071},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5761696100234985},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.5381373763084412},{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.4843614995479584},{"id":"https://openalex.org/C196371267","wikidata":"https://www.wikidata.org/wiki/Q3998979","display_name":"Triple modular redundancy","level":3,"score":0.4335118532180786},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3324979245662689},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.147885262966156}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/reconfig.2016.7857154","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2016.7857154","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 International Conference on ReConFigurable Computing and FPGAs (ReConFig)","raw_type":"proceedings-article"},{"id":"pmh:oai:spiral.imperial.ac.uk:10044/1/54274","is_oa":false,"landing_page_url":"http://hdl.handle.net/10044/1/54274","pdf_url":null,"source":{"id":"https://openalex.org/S4306401396","display_name":"Spiral (Imperial College London)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I47508984","host_organization_name":"Imperial College London","host_organization_lineage":["https://openalex.org/I47508984"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"International Conference on Reconfigurable Computing and FPGAs (ReConFig)","raw_type":"Conference Paper"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1976834654","https://openalex.org/W1979951430","https://openalex.org/W2009950553","https://openalex.org/W2026478989","https://openalex.org/W2036545838","https://openalex.org/W2047797144","https://openalex.org/W2074029610","https://openalex.org/W2076833257","https://openalex.org/W2099002460","https://openalex.org/W2150650385","https://openalex.org/W2183688183","https://openalex.org/W2324943678","https://openalex.org/W3144951481","https://openalex.org/W4253558656","https://openalex.org/W6685784710"],"related_works":["https://openalex.org/W58658798","https://openalex.org/W3114375939","https://openalex.org/W2797678940","https://openalex.org/W3008821054","https://openalex.org/W2130594209","https://openalex.org/W2759696718","https://openalex.org/W2359816675","https://openalex.org/W2491217195","https://openalex.org/W4210531477","https://openalex.org/W2603119174"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"an":[3,95],"area-driven":[4],"Field-Programmable":[5],"Gate":[6],"Array":[7],"(FPGA)":[8],"scrubbing":[9,34,50,77,98],"technique":[10,99],"based":[11,100],"on":[12,35,42,56,101],"partial":[13],"reconfiguration":[14],"for":[15,78,115],"Single":[16],"Event":[17],"Upset":[18],"(SEU)":[19],"mitigation.":[20],"The":[21],"proposed":[22],"method":[23],"is":[24,90],"compared":[25],"with":[26],"existing":[27,96],"techniques":[28],"such":[29],"as":[30],"blind":[31,76],"and":[32,49],"on-demand":[33,97],"a":[36,63,79,85],"novel":[37],"SEU":[38,48],"mitigation":[39],"framework":[40],"implemented":[41],"the":[43,57,116],"ZYNQ":[44],"platform,":[45],"supporting":[46],"various":[47],"rates.":[51],"A":[52,92],"design":[53],"space":[54],"exploration":[55],"availability":[58,82],"versus":[59],"data":[60],"transfers":[61],"from":[62],"Double":[64],"Data":[65],"Rate":[66],"Type":[67],"3":[68],"(DDR3)":[69],"memory,":[70],"shows":[71,106],"that":[72,107],"our":[73,108],"approach":[74,109],"outperforms":[75],"range":[80],"of":[81],"values":[83],"when":[84],"second":[86],"order":[87],"polynomial":[88],"IP":[89],"targeted.":[91],"comparison":[93],"to":[94,112],"Dual":[102],"Modular":[103],"Redundancy":[104],"(DMR)":[105],"saves":[110],"up":[111],"46%":[113],"area":[114],"same":[117],"case":[118],"study.":[119]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2020,"cited_by_count":3}],"updated_date":"2026-03-20T23:20:44.827607","created_date":"2025-10-10T00:00:00"}