{"id":"https://openalex.org/W2285750986","doi":"https://doi.org/10.1109/reconfig.2015.7393353","title":"Resource-saving compile flow for coarse-grained reconfigurable architectures","display_name":"Resource-saving compile flow for coarse-grained reconfigurable architectures","publication_year":2015,"publication_date":"2015-12-01","ids":{"openalex":"https://openalex.org/W2285750986","doi":"https://doi.org/10.1109/reconfig.2015.7393353","mag":"2285750986"},"language":"en","primary_location":{"id":"doi:10.1109/reconfig.2015.7393353","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2015.7393353","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5062730166","display_name":"Zhongyuan Zhao","orcid":"https://orcid.org/0000-0002-6637-553X"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhongyuan Zhao","raw_affiliation_strings":["Department of Micro/NaNo Electronics, Shanghai Jiao Tong University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Micro/NaNo Electronics, Shanghai Jiao Tong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043703962","display_name":"Weiguang Sheng","orcid":"https://orcid.org/0000-0002-7831-526X"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Weiguang Sheng","raw_affiliation_strings":["Department of Micro/NaNo Electronics, Shanghai Jiao Tong University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Micro/NaNo Electronics, Shanghai Jiao Tong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045693138","display_name":"Naifeng Jing","orcid":"https://orcid.org/0000-0001-8417-5796"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Naifeng Jing","raw_affiliation_strings":["Department of Micro/NaNo Electronics, Shanghai Jiao Tong University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Micro/NaNo Electronics, Shanghai Jiao Tong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101583945","display_name":"Weifeng He","orcid":"https://orcid.org/0000-0002-7753-644X"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Weifeng He","raw_affiliation_strings":["Department of Micro/NaNo Electronics, Shanghai Jiao Tong University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Micro/NaNo Electronics, Shanghai Jiao Tong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5103236320","display_name":"Zhigang Mao","orcid":"https://orcid.org/0000-0001-9431-9853"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhigang Mao","raw_affiliation_strings":["Department of Micro/NaNo Electronics, Shanghai Jiao Tong University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Micro/NaNo Electronics, Shanghai Jiao Tong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I183067930"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8202890157699585},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.7942146062850952},{"id":"https://openalex.org/keywords/compile-time","display_name":"Compile time","score":0.7310409545898438},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.6271026134490967},{"id":"https://openalex.org/keywords/data-flow-analysis","display_name":"Data-flow analysis","score":0.5884200930595398},{"id":"https://openalex.org/keywords/modulo","display_name":"Modulo","score":0.5845039486885071},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5679410696029663},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.4592009484767914},{"id":"https://openalex.org/keywords/resource","display_name":"Resource (disambiguation)","score":0.4395591616630554},{"id":"https://openalex.org/keywords/data-flow-diagram","display_name":"Data flow diagram","score":0.4292590618133545},{"id":"https://openalex.org/keywords/control-flow-graph","display_name":"Control flow graph","score":0.42550894618034363},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.36654457449913025},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.2073926031589508},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.1330408751964569},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.11668556928634644},{"id":"https://openalex.org/keywords/database","display_name":"Database","score":0.11490252614021301},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.08356711268424988}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8202890157699585},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.7942146062850952},{"id":"https://openalex.org/C200833197","wikidata":"https://www.wikidata.org/wiki/Q333707","display_name":"Compile time","level":3,"score":0.7310409545898438},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.6271026134490967},{"id":"https://openalex.org/C88468194","wikidata":"https://www.wikidata.org/wiki/Q1172416","display_name":"Data-flow analysis","level":3,"score":0.5884200930595398},{"id":"https://openalex.org/C54732982","wikidata":"https://www.wikidata.org/wiki/Q1415345","display_name":"Modulo","level":2,"score":0.5845039486885071},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5679410696029663},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.4592009484767914},{"id":"https://openalex.org/C206345919","wikidata":"https://www.wikidata.org/wiki/Q20380951","display_name":"Resource (disambiguation)","level":2,"score":0.4395591616630554},{"id":"https://openalex.org/C489000","wikidata":"https://www.wikidata.org/wiki/Q747385","display_name":"Data flow diagram","level":2,"score":0.4292590618133545},{"id":"https://openalex.org/C27458966","wikidata":"https://www.wikidata.org/wiki/Q1187693","display_name":"Control flow graph","level":2,"score":0.42550894618034363},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.36654457449913025},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.2073926031589508},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.1330408751964569},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.11668556928634644},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.11490252614021301},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.08356711268424988},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/reconfig.2015.7393353","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2015.7393353","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W93901327","https://openalex.org/W100219016","https://openalex.org/W1966326666","https://openalex.org/W2023027709","https://openalex.org/W2040412852","https://openalex.org/W2059626842","https://openalex.org/W2105853930","https://openalex.org/W2113755305","https://openalex.org/W2116304229","https://openalex.org/W2121082877","https://openalex.org/W2122171990","https://openalex.org/W2123412205","https://openalex.org/W2153185479","https://openalex.org/W2168922271","https://openalex.org/W2168933917","https://openalex.org/W4250523893"],"related_works":["https://openalex.org/W1601646354","https://openalex.org/W2078700326","https://openalex.org/W2080682474","https://openalex.org/W1578084133","https://openalex.org/W1550846314","https://openalex.org/W2124222401","https://openalex.org/W2285750986","https://openalex.org/W1587092156","https://openalex.org/W4240983189","https://openalex.org/W2952722359"],"abstract_inverted_index":{"Coarse-Grained":[0],"Reconfigurable":[1],"Architectures":[2],"(CGRA)":[3],"are":[4],"promising":[5],"accelerators":[6],"with":[7,121,158,183,200],"high":[8],"performance":[9,208],"and":[10,52,84,130,139,179,196],"power-efficiency.":[11],"Most":[12],"compilers":[13,100],"map":[14],"loop":[15],"kernels":[16],"of":[17,36,50],"the":[18,30,48,55,60,69,87,92,128,151],"compute-intensive":[19],"applications":[20],"onto":[21],"CGRA":[22,39,120,172],"through":[23],"modified":[24,42,57,88,133],"modulo":[25],"scheduling":[26],"algorithms.":[27],"EPIMap":[28,212],"converts":[29],"problem":[31],"into":[32],"finding":[33],"a":[34,102,118,137,154],"subgraph":[35],"time":[37,64,95,160],"extend":[38,65,96],"that":[40,168],"matches":[41],"data":[43],"flow":[44,143,189,206],"graph":[45],"(DFG).":[46],"Therefore,":[47],"number":[49],"nodes":[51,83,129],"edges":[53,85,131],"in":[54,63,86,94,132],"final":[56],"DFG":[58,89,141,187],"decides":[59],"resources":[61,93,181,198],"used":[62],"CGRA,":[66,185],"thus":[67],"influence":[68],"performance.":[70],"To":[71,108],"this":[72,112],"end,":[73],"it":[74],"is":[75,162],"essential":[76],"to":[77,90,105,116,149],"find":[78],"an":[79],"effective":[80],"way":[81,104],"reducing":[82,127],"save":[91,174,191],"CGRA.":[97],"Besides,":[98,202],"existing":[99],"lack":[101],"systematic":[103,140],"modify":[106],"DFG.":[107,134],"address":[109],"these":[110],"problems,":[111],"paper":[113],"firstly":[114],"choose":[115],"use":[117],"new":[119],"global":[122,170],"synchronization":[123],"mechanism,":[124],"which":[125,144],"help":[126],"Secondly,":[135],"proposing":[136],"complete":[138],"modification":[142],"saves":[145],"more":[146],"resources.":[147],"Finally,":[148],"reduce":[150],"compile":[152,205,216],"time,":[153],"resource-monitoring":[155],"mapping":[156],"heuristic":[157],"lower":[159],"complexity":[161],"provided.":[163],"The":[164],"experiment":[165],"result":[166],"shows":[167],"our":[169,186,203],"synchronized":[171],"can":[173,190],"at":[175,192],"most":[176,193],"17%":[177],"computing":[178,195],"routing":[180,197],"compared":[182,199],"general":[184],"modifying":[188],"20%":[194],"EPIMap.":[201],"resource-saving":[204],"generate":[207],"as":[209,211],"good":[210],"while":[213],"taking":[214],"less":[215],"time.":[217]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}