{"id":"https://openalex.org/W2056497747","doi":"https://doi.org/10.1109/reconfig.2014.7032545","title":"Parameterised FPGA reconfigurations for efficient test set generation","display_name":"Parameterised FPGA reconfigurations for efficient test set generation","publication_year":2014,"publication_date":"2014-12-01","ids":{"openalex":"https://openalex.org/W2056497747","doi":"https://doi.org/10.1109/reconfig.2014.7032545","mag":"2056497747"},"language":"en","primary_location":{"id":"doi:10.1109/reconfig.2014.7032545","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2014.7032545","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 International Conference on ReConFigurable Computing and FPGAs (ReConFig14)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5037198657","display_name":"Alexandra Kourfali","orcid":"https://orcid.org/0000-0003-3430-1007"},"institutions":[{"id":"https://openalex.org/I32597200","display_name":"Ghent University","ror":"https://ror.org/00cv9y106","country_code":"BE","type":"education","lineage":["https://openalex.org/I32597200"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Alexandra Kourfali","raw_affiliation_strings":["Department of Electronics and Information Systems (ELIS), Ghent University, Ghent, Belgium","Department of Electronics and Information Systems (ELIS), Ghent University, Sint\u2010Pietersnieuwstraat 41,B\u20109000 Ghent, Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Information Systems (ELIS), Ghent University, Ghent, Belgium","institution_ids":["https://openalex.org/I32597200"]},{"raw_affiliation_string":"Department of Electronics and Information Systems (ELIS), Ghent University, Sint\u2010Pietersnieuwstraat 41,B\u20109000 Ghent, Belgium","institution_ids":["https://openalex.org/I32597200"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073897749","display_name":"Elias Vansteenkiste","orcid":null},"institutions":[{"id":"https://openalex.org/I32597200","display_name":"Ghent University","ror":"https://ror.org/00cv9y106","country_code":"BE","type":"education","lineage":["https://openalex.org/I32597200"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Elias Vansteenkiste","raw_affiliation_strings":["Department of Electronics and Information Systems (ELIS), Ghent University, Ghent, Belgium","Department of Electronics and Information Systems (ELIS), Ghent University, Sint\u2010Pietersnieuwstraat 41,B\u20109000 Ghent, Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Information Systems (ELIS), Ghent University, Ghent, Belgium","institution_ids":["https://openalex.org/I32597200"]},{"raw_affiliation_string":"Department of Electronics and Information Systems (ELIS), Ghent University, Sint\u2010Pietersnieuwstraat 41,B\u20109000 Ghent, Belgium","institution_ids":["https://openalex.org/I32597200"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5004502321","display_name":"Dirk Stroobandt","orcid":"https://orcid.org/0000-0002-4477-5313"},"institutions":[{"id":"https://openalex.org/I32597200","display_name":"Ghent University","ror":"https://ror.org/00cv9y106","country_code":"BE","type":"education","lineage":["https://openalex.org/I32597200"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Dirk Stroobandt","raw_affiliation_strings":["Department of Electronics and Information Systems (ELIS), Ghent University, Ghent, Belgium","Department of Electronics and Information Systems (ELIS), Ghent University, Sint\u2010Pietersnieuwstraat 41,B\u20109000 Ghent, Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Information Systems (ELIS), Ghent University, Ghent, Belgium","institution_ids":["https://openalex.org/I32597200"]},{"raw_affiliation_string":"Department of Electronics and Information Systems (ELIS), Ghent University, Sint\u2010Pietersnieuwstraat 41,B\u20109000 Ghent, Belgium","institution_ids":["https://openalex.org/I32597200"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I32597200"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"3","issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7565536499023438},{"id":"https://openalex.org/keywords/fault-injection","display_name":"Fault injection","score":0.7233869433403015},{"id":"https://openalex.org/keywords/emulation","display_name":"Emulation","score":0.7172728180885315},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7025415897369385},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.6845192313194275},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.6260495781898499},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.6230151653289795},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5933791995048523},{"id":"https://openalex.org/keywords/test-set","display_name":"Test set","score":0.5094955563545227},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.5065282583236694},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.4988536834716797},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.49354374408721924},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.48451679944992065},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3604743480682373},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.3291933238506317},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17859980463981628},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.11219730973243713}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7565536499023438},{"id":"https://openalex.org/C2775928411","wikidata":"https://www.wikidata.org/wiki/Q2041312","display_name":"Fault injection","level":3,"score":0.7233869433403015},{"id":"https://openalex.org/C149810388","wikidata":"https://www.wikidata.org/wiki/Q5374873","display_name":"Emulation","level":2,"score":0.7172728180885315},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7025415897369385},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.6845192313194275},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.6260495781898499},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.6230151653289795},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5933791995048523},{"id":"https://openalex.org/C169903167","wikidata":"https://www.wikidata.org/wiki/Q3985153","display_name":"Test set","level":2,"score":0.5094955563545227},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.5065282583236694},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.4988536834716797},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.49354374408721924},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.48451679944992065},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3604743480682373},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3291933238506317},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17859980463981628},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.11219730973243713},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C50522688","wikidata":"https://www.wikidata.org/wiki/Q189833","display_name":"Economic growth","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/reconfig.2014.7032545","is_oa":false,"landing_page_url":"https://doi.org/10.1109/reconfig.2014.7032545","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 International Conference on ReConFigurable Computing and FPGAs (ReConFig14)","raw_type":"proceedings-article"},{"id":"pmh:oai:archive.ugent.be:5836097","is_oa":false,"landing_page_url":"http://hdl.handle.net/1854/LU-5836097","pdf_url":null,"source":{"id":"https://openalex.org/S4306400478","display_name":"Ghent University Academic Bibliography (Ghent University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I32597200","host_organization_name":"Ghent University","host_organization_lineage":["https://openalex.org/I32597200"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"ISBN: 978-1-4799-5944-0","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.6299999952316284,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320321732","display_name":"Agentschap voor Innovatie door Wetenschap en Technologie","ror":"https://ror.org/01antkr91"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1531820794","https://openalex.org/W2025907248","https://openalex.org/W2033589075","https://openalex.org/W2048110685","https://openalex.org/W2090193813","https://openalex.org/W2099260966","https://openalex.org/W2106969279","https://openalex.org/W2109208936","https://openalex.org/W2119280572","https://openalex.org/W2143105503","https://openalex.org/W2145233434","https://openalex.org/W2164363068","https://openalex.org/W2989364934","https://openalex.org/W4238389067","https://openalex.org/W6675101201"],"related_works":["https://openalex.org/W2091833418","https://openalex.org/W1991935474","https://openalex.org/W2091533492","https://openalex.org/W2129713538","https://openalex.org/W2341817401","https://openalex.org/W2408214455","https://openalex.org/W1953724919","https://openalex.org/W2128148266","https://openalex.org/W1493811107","https://openalex.org/W3038280805"],"abstract_inverted_index":{"This":[0,84],"paper":[1,85],"proposes":[2,86],"the":[3,26,70,97,116,122,130,138],"use":[4,52],"of":[5,19,72,115,121,137],"parameterised":[6,98],"FPGA":[7,74,123],"configurations":[8],"for":[9,39,129],"a":[10,87,134,147],"new":[11,102],"test":[12,20,32,40],"set":[13,21,41],"generation":[14,22,42],"approach.":[15],"The":[16,101,126],"time-consuming":[17],"problem":[18],"aims":[23],"at":[24],"finding":[25],"right":[27],"input":[28],"values":[29],"to":[30,51,54,64,146,151],"fully":[31],"an":[33,142],"ASIC":[34],"design.":[35],"Since":[36],"well-known":[37],"methods":[38],"such":[43],"as":[44],"fault":[45,66,75,89,94],"simulation":[46],"techniques":[47,77],"have":[48,59],"become":[49],"impractical":[50],"due":[53],"their":[55],"speed":[56],"limitations,":[57],"FPGAs":[58],"been":[60],"used":[61],"in":[62],"order":[63],"facilitate":[65],"injection":[67,76,90],"techniques.":[68],"However,":[69],"development":[71],"previous":[73],"demonstrate":[78],"either":[79],"area":[80,143],"or":[81],"time":[82],"overhead.":[83],"post-synthesis":[88],"method":[91],"that":[92],"combines":[93],"emulation":[95],"with":[96,107],"configuration":[99],"technique.":[100],"fault-injected":[103],"design":[104],"is":[105],"mapped":[106],"different":[108],"mapping":[109],"solutions":[110],"based":[111],"on":[112],"dynamic":[113],"specialisation":[114],"logic":[117,139],"and":[118,141],"routing":[119],"infrastructure":[120],"during":[124],"runtime.":[125],"experimental":[127],"results":[128],"proposed":[131],"technique":[132],"indicate":[133],"significant":[135],"reduction":[136,144],"depth":[140],"up":[145],"factor":[148],"10":[149],"compared":[150],"conventional":[152],"tools.":[153]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2015,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
